US 8,045,626 B2Granted

Differential transmitter, differential receiver, signal transmitter, and signal transmitting system

AssigneeRenesas Electronics Corporation

InventorTadashi Iwasaki

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Abstract

According to one embodiment of the present invention, it is possible to realize a signal transmitter which is capable of reducing power consumption and which can be easily designed. A differential transmitter block outputs differential output signals fixed to a predetermined logic signal to a differential receiver block and disconnects terminating resistors from a signal transmission path in an idle state. In the differential receiver block, a differential comparator outputs a logic determined by symbols of the differential output signal from the differential transmitter block, and an operating state detector detects the idle state upon detection that time successively outputting a predetermined logic by the differential comparator reaches a predetermined time, and controls switches so as to disconnect the terminating resistors from the signal transmitter in the receiving side upon detection of the idle state.

Claims8

Dependent claims

A differential transmitter, comprising:

a transmitting side signal transmitter outputting differential output signals in accordance with differential input signals which are input;
a pair of output terminals outputting the differential output signals from the transmitting side signal transmitter;
a pair of transmitting side terminating resistors, each of which being connected in parallel between the transmitting side signal transmitter and the pair of output terminals;
and
a transmitting side terminating resistor connection controller disconnecting the pair of transmitting side terminating resistors from the transmitting side signal transmitter in an idle state where logic data selected as the differential input signals are input,
wherein the transmitting side signal transmitter includes a differential pair formed by a pair of transistors to output the differential output signal, each of the pair of transmitting side terminating resistors is connected to each of drain sides of a pair of transistors forming the differential pair, and the transmitting side terminating resistor connection controller includes a switch circuit and a clamp circuit, the switch circuit disconnecting one of the transmitting side terminating resistors from the transmitting side signal transmitter in the idle state, and the clamp circuit clamping gate voltage of the transistor connected to the other one of the transmitting side terminating resistors so as to turn OFF the transistor.

3 more elements

A signal transmitter including a differential transmitter and a differential receiver, wherein the differential transmitter comprises:

a transmitting side signal transmitter outputting differential output signals in accordance with differential input signals which are input;
a pair of output terminals outputting the differential output signals from the transmitting side signal transmitter to the differential receiver;
a pair of transmitting side terminating resistors, each of which being connected in parallel between the transmitting side signal transmitter and the pair of output terminals;
and
a transmitting side terminating resistor connection controller disconnecting the pair of transmitting side terminating resistors from the transmitting side signal transmitter in an idle state where logic data selected as the differential input signals are input, and the differential receiver comprises:
a pair of input terminals to which the differential output signals from the differential transmitter are input;
a receiving side signal transmitter outputting a logic signal determined by symbols of the differential outputs input from the pair of input terminals;
a pair of receiving side terminating resistors, each of which being connected in parallel between the pair of input terminals and the receiving side signal transmitter;
a receiving side terminating resistor connection controller capable of disconnecting the pair of receiving side terminating resistors from the receiving side signal transmitter;
and
an operating state detector detecting an idle state upon detection that time successively outputting a predetermined logic by the receiving side signal transmitter reaches a predetermined time, and controlling the receiving side terminating resistor connection controller to perform the disconnecting of the pair of receiving side terminating resistors from the receiving side signal transmitter upon detection of the idle state,
wherein the transmitting side signal transmitter includes a differential pair formed by a pair of transistors to output the differential output signal, each of the pair of transmitting side terminating resistors is connected to each of drain sides of a pair of transistors forming the differential pair, and the transmitting side terminating resistor connection controller includes a switch circuit and a clamp circuit, the switch circuit disconnecting one of the transmitting side terminating resistors from the transmitting side signal transmitter in the idle state, and the clamp circuit clamping gate voltage of the transistor connected to the other one of the transmitting side terminating resistors so as to turn OFF the transistor.

9 more elements

A signal transmitting system including a plurality of signal transmission lanes and an idle state detector,

wherein the signal transmission lane includes a differential transmitter and a differential receiver, and the differential transmitter comprises:
a transmitting side signal transmitter outputting differential output signals in accordance with differential input signals which are input;
a pair of output terminals outputting the differential output signals from the transmitting side signal transmitter to the differential receiver;
a pair of transmitting side terminating resistors, each of which being connected in parallel between the transmitting side signal transmitter and the pair of output terminals;
and
a transmitting side terminating resistor connection controller disconnecting the pair of transmitting side terminating resistors from the transmitting side signal transmitter in an idle state where logic data selected as the differential input signals are input, and the differential receiver comprises:
a pair of input terminals to which the differential output signals from the differential transmitter are input;
a receiving side signal transmitter outputting a logic signal determined by symbols of the differential outputs input from the pair of input terminals;
a pair of receiving side terminating resistors, each of which being connected in parallel between the pair of input terminals and the receiving side signal transmitter;
and
a switch controller capable of disconnecting the pair of receiving side terminating resistors from the receiving side signal transmitter, and
the idle state detector comprises:
a signal output circuit for idle state detection outputting a signal for idle state detection on a condition that each logic signal output from each differential receiver of each signal transmission lane outputs the same predetermined logic;
and
a receiving side terminating resistor disconnection controller detecting the idle state by detecting that time successively outputting the signal for idle detection reaches a predetermined time by the signal output circuit for idle state detection, and controlling the switch controller of the differential receiver in each signal lane to performing the disconnecting of the pair of receiving side terminating resistors from the receiving side signal transmitter upon detection of the idle state, and
wherein the transmitting side signal transmitter includes a differential pair formed by a pair of transistors to output the differential output signal, each of the pair of transmitting side terminating resistors is connected to each of drain sides of a pair of transistors forming the differential pair, and the transmitting side terminating resistor connection controller includes a switch circuit and a clamp circuit, the switch circuit disconnecting one of the transmitting side terminating resistors from the transmitting side signal transmitter in the idle state, and the clamp circuit clamping gate voltage of the transistor connected to the other one of the transmitting side terminating resistors so as to turn OFF the transistor.

13 more elements

A signal transmitter including a differential transmitter and a differential receiver, wherein the differential transmitter comprises:

a transmitting side signal transmitter outputting differential output signals in accordance with differential input signals which are input;
a pair of output terminals outputting the differential output signals from the transmitting side signal transmitter to the differential receiver;
a pair of transmitting side terminating resistors, each of which being connected in parallel between the transmitting side signal transmitter and the pair of output terminals;
and
a transmitting side terminating resistor connection controller disconnecting the pair of transmitting side terminating resistors from the transmitting side signal transmitter in an idle state where logic data selected as the differential input signals are input, and the differential receiver comprises:
a pair of input terminals to which the differential output signals from the differential transmitter are input;
a receiving side signal transmitter outputting a logic signal determined by symbols of the differential outputs input from the pair of input terminals;
a pair of receiving side terminating resistors, each of which being connected in parallel between the pair of input terminals and the receiving side signal transmitter;
a receiving side terminating resistor connection controller capable of disconnecting the pair of receiving side terminating resistors from the receiving side signal transmitter;
and
an operating state detector detecting an idle state upon detection that time successively outputting a predetermined logic by the receiving side signal transmitter reaches a predetermined time, and controlling the receiving side terminating resistor connection controller to perform the disconnecting of the pair of receiving side terminating resistors from the receiving side signal transmitter upon detection of the idle state, and
wherein the operating state detector includes an edge-triggered flip-flop circuit detecting a change of the output of the receiving side signal transmitter from the predetermined logic to another logic, and the differential receiver controls the receiving side terminating resistor connection controller so as to connect the pair of receiving side terminating resistors to the receiving side signal transmitter upon detection of the change by the flip-flop circuit.

9 more elements

A signal transmitting system including a plurality of signal transmission lanes and an idle state detector,

wherein the signal transmission lane includes a differential transmitter and a differential receiver, and the differential transmitter comprises:
a transmitting side signal transmitter outputting differential output signals in accordance with differential input signals which are input;
a pair of output terminals outputting the differential output signals from the transmitting side signal transmitter to the differential receiver;
a pair of transmitting side terminating resistors, each of which being connected in parallel between the transmitting side signal transmitter and the pair of output terminals;
and
a transmitting side terminating resistor connection controller disconnecting the pair of transmitting side terminating resistors from the transmitting side signal transmitter in an idle state where logic data selected as the differential input signals are input, and the differential receiver comprises:
a pair of input terminals to which the differential output signals from the differential transmitter are input;
a receiving side signal transmitter outputting a logic signal determined by symbols of the differential outputs input from the pair of input terminals;
a pair of receiving side terminating resistors, each of which being connected in parallel between the pair of input terminals and the receiving side signal transmitter;
and
a switch controller capable of disconnecting the pair of receiving side terminating resistors from the receiving side signal transmitter, and
the idle state detector comprises:
a signal output circuit for idle state detection outputting a signal for idle state detection on a condition that each logic signal output from each differential receiver of each signal transmission lane outputs the same predetermined logic;
and
a receiving side terminating resistor disconnection controller detecting the idle state by detecting that time successively outputting the signal for idle detection reaches a predetermined time by the signal output circuit for idle state detection, and controlling the switch controller of the differential receiver in each signal lane to performing the disconnecting of the pair of receiving side terminating resistors from the receiving side signal transmitter upon detection of the idle state, and
wherein the operating state detector includes an edge-triggered flip-flop circuit detecting a change of the output of the receiving side signal transmitter from the predetermined logic to another logic, and the differential receiver controls the receiving side terminating resistor connection controller so as to connect the pair of receiving side terminating resistors to the receiving side signal transmitter upon detection of the change by the flip-flop circuit.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/194,578Filed 20 Aug 2008
Priority: JP 2007-21326820 Aug 2007
Published: US 2009/0052559 A126 Feb 2009
Granted: 25 Oct 2011
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

H04L 25/029
Arrangements specific to the transmitter end: provision of high-impedance states
H04L 25/0292
Arrangements for coupling to transmission lines: arrangements specific to the receiver end
H04L 25/0272
Arrangements for coupling to transmission lines: arrangements for coupling to multiple lines, e.g. for differential transmission
H04L
Digital communication