Module and architecture for generating real-time, multiple-resolution video streams and the architecture thereof

An architecture for generating real-time, multiple-resolution video streams, for use in multiple-channel image processing;

• comprising:
• a plurality of video devices, for capturing n video data;
• a video-processing module, coupled to said video devices and inputting said nth video data to perform a parallel operation process in order to output the multiple-resolution video streams corresponding to each video data in real time;
• said module further comprising:
• a system bus;
• an external memory, coupled to said system bus;
• and
• a main processor, further comprising:
• a microprocessor, coupled to said system bus;
• a main arithmetic unit, coupled to said system bus;
• and
• a secondary arithmetic unit, coupled to said system bus;
• a first network server, coupled to said video-processing module and a network system, and outputting said video streams via a first communication protocol after inputting image data;
• a second network server, coupled to said network system and a plurality of receivers, and inputting said image data and outputting said video streams to said receivers via a second communication protocol;
• wherein, when processing n video data, said module performs a parallel operation process, comprising the steps:
• (a) Sampling an nth video data down by m times to generate corresponding k down-sampled video data, where m is a positive real number and k is a positive integer, and m and k have one-to-one relationship;
• (b) Outputting a down-sampled video data of said nth video data by said external memory to said main arithmetic unit to generate D(n) data, which is stored in said external memory, wherein D(n) is said nth video data, where n is a positive integer;
• (c) After said module has performed a information refining process, said external memory inputs said nth video data and a target data corresponding to said data D(n) to said secondary arithmetic unit so as to process corresponding data, and instantly causing an n−1th video data to perform corresponding Steps (a) and (b) correspondingly in real time;
• and
• (d) Individually providing the remaining k−1 down-sampled video data with corresponding target data via said data D(n);
• via said nth video data and a target data corresponding to said k−1 down-sampled video data, performing said corresponding data operations by said secondary arithmetic unit to generate said k−1 resolution video streams, which are stored in said external memory, then instantly causing said n−1th video data to perform corresponding Steps (c) and (d);
• Via said Steps (a)˜(d), n video data generate corresponding multiple-resolution video streams in real time.