Configuring routing in mesh networks

An apparatus, comprising:

• a plurality of processor cores;
• an interconnection network to interconnect the processor cores and enable transfer of data among the processor cores;
• and
• an extension network to connect input/output ports of the interconnection network to input/output ports of one or more peripheral devices, each input/output port of the interconnection network being associated with one of the processor cores such that each input/output port of the interconnection network sends input data to the associated processor core and receives output data from the associated processor core,
• the extension network being configurable such that a mapping between input/output ports of the interconnection network and input/output ports of the one or more peripheral devices is configurable;
• and
• the one or more peripheral devices, in which each peripheral device and a portion of the extension network are defined using a hardware macro, and the same hardware macro is used to define at least two peripheral devices and their corresponding portions of the extension network.

An apparatus, comprising:

• a two-dimensional array of processor tiles, each processor tile comprising a processor core;
• a two-dimensional mesh network to interconnect the processor cores and enable transfer of data among the processor cores;
• and
• an extension network to connect input/output (I/O) ports of the mesh network to I/O ports of at least a first peripheral device and a second peripheral device, the I/O ports of the mesh network being associated with a row or a column of the processor tiles at an edge of the array of processor tiles such that each I/O port sends input data to the corresponding processor tile and receives output data from the corresponding processor tile;
• wherein the first peripheral device is located closer to a first half of the processor tiles, the second peripheral device is located closer to a second half of the processor tiles,
• the extension network connects some I/O ports of the first peripheral device to I/O ports of the mesh network that are associated with processor tiles in the first half of the processor tiles,
• the extension network connects some I/O ports of the first peripheral device to I/O ports of the mesh network that are associated with processor tiles in the second half of the processor tiles,
• the extension network connects some I/O ports of the second peripheral device to I/O ports of the mesh network that are associated with processor tiles in the first half of the processor tiles, and
• the extension network connects some I/O ports of the second peripheral device to I/O ports of the mesh network that are associated with processor tiles in the second half of the processor tiles.