Methods and apparatus for programming a memory cell using one or more blocking memory cells
AssigneeMicron Technology, Inc.
InventorsGiovanni Santin, Michele Incarnati
Life of this patent
Estimating the term…
Abstract
Methods and apparatus for programming a memory cell using one or more blocking memory cells facilitate mitigation of capacitive voltage coupling. The methods include applying a program voltage to a selected memory cell of a string of memory cells, and applying a cutoff voltage to a set of one or more memory cells of the string between the selected memory cell and a select gate. The methods further include applying a pass voltage to one or more other memory cells of the string between the selected memory cell and the select gate. Other methods further include applying other pass voltages, other cutoff voltages and/or intermediate voltages to still other memory cells of the string.
Claims20
A method of programming a memory cell, the method comprising:
- applying a program voltage to a selected memory cell of a string of memory cells;
- applying a cutoff voltage to a first set of one or more memory cells of the string between the selected memory cell and a select gate;
- applying a first pass voltage to a second set of one or more memory cells of the string between the first set of one or more memory cells and the select gate;
- and
- applying a second pass voltage to a third set of one or more remaining memory cells of the string, where the first pass voltage is between the second pass voltage and a reference voltage.
A method of programming a memory cell, the method comprising:
- applying a program voltage to a selected memory cell of a string of memory cells;
- applying a cutoff voltage to a first set of one or more memory cells of the string between the selected memory cell and a select gate;
- applying a first pass voltage to a second set of one or more memory cells of the string between the first set of one or more memory cells and the select gate;
- and
- applying a second pass voltage to one or more remaining memory cells of the string,
- wherein the first pass voltage is between the second pass voltage and a reference potential.
A method of programming a memory cell, the method comprising:
- applying a program voltage to a selected memory cell of a string of memory cells;
- applying a cutoff voltage to one or more memory cells of the string between the selected memory cell and a first select gate;
- applying a cutoff voltage to one or more memory cells of the string between the selected memory cell and a second select gate;
- applying a pass voltage to one or more remaining memory cells of the string.
A memory device comprising:
- a string of memory cells;
- and
- control circuitry, wherein the control circuitry is configured to:
- apply a program voltage to a selected memory cell of the string of memory cells;
- apply a cutoff voltage to a first set of one or more memory cells of the string between the selected memory cell and a select gate;
- apply a first pass voltage to a second set of one or more memory cells of the string between the first set of one or more memory cells and the select gate;
- and
- apply a second pass voltage to a third set of one or more remaining memory cells of the string, where the first pass voltage is between the second pass voltage and a reference voltage.
A memory device comprising:
- a string of memory cells;
- and
- control circuitry, wherein the control circuitry is configured to:
- apply a program voltage to a selected memory cell of the string of memory cells;
- apply a cutoff voltage to a first set of one or more memory cells of the string between the selected memory cell and a select gate;
- apply a first pass voltage to a second set of one or more memory cells of the string between the first set of one or more memory cells and the select gate;
- and
- apply a second pass voltage to one or more remaining memory cells of the string,
- wherein the first pass voltage is between the second pass voltage and a reference potential.
A memory device comprising:
- a string of memory cells;
- and
- control circuitry, wherein the control circuitry is configured to:
- apply a program voltage to a selected memory cell of the string of memory cells;
- apply a cutoff voltage to one or more memory cells of the string between the selected memory cell and a first select gate;
- apply a cutoff voltage to one or more memory cells of the string between the selected memory cell and a second select gate;
- and
- apply a pass voltage to one or more remaining memory cells of the string.
Dependencies are inferred from the claim text.