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US 8,045,360 B2Granted
Semiconductor device having single-ended sensing amplifier
AssigneeElpida Memory, Inc.
InventorKazuhiko Kajigaya
Life of this patent
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Abstract
A sense amplifier in a semiconductor storage device includes a memory cell for storing information on the basis of the size of the resistance value between a signal input/output terminal and a power supply terminal, the semiconductor storage device having a structure in which the bit line capacitance during signal reading from the memory cell is reduced, wherein the amplifier amplifies a signal outputted from an input/output terminal through the use of a single MOS transistor that has a single-ended structure.
Claims24
A semiconductor device comprising:
- a memory cell that stores information based on a resistance value between an input/output terminal and a power supply terminal, or an ON current value of a cell transistor connected to the input/output terminal;
- a bit line connected to the input/output terminal that inputs and ouputs the information to and from the memory cell, respectively;
- a first field-effect transistor that works as a single-ended sense amplifier having a gate connected to the bit line that amplifies a data signal on the bit line;
- a second field-effect transistor connected to the bit line that controls a potential of the bit line to a first predetermined potential;
- a third field-effect transistor that supplies an output signal of the first field-effect transistor to a global bit line;
- and
- a global bit line sense amplifier connected to the global bit line that detects a signal on the global bit line, wherein
- the first predetermined potential of the bit line varies in accordance with a current flowing through the memory cell, and the first field-effect transistor flows a current in accordance with the varied potential of the bit line.
5 more elements
A semiconductor device, comprising:
- a memory cell that stores information according to a resistance value between any of an input and output terminal and a power supply terminal, and an ON current value of a cell transistor connected to the input and output terminal;
- a first transistor providing a single-ended sense amplifier, the first transistor including a first electrode of a principal electrically conducting channel,
- a second electrode of the principal electrically conducting channel, and
- a control electrode, the control electrode regulating a current flow between the first electrode and the second electrode of the principal electrically conducting channel,
- the first transistor including the control electrode connected to the memory cell that amplifies a data signal to the memory cell;
- a second transistor connected to the memory cell that controls a potential of a line connected to the memory cell to a first predetermined potential;
- a third transistor that supplies an output signal of the first transistor to a second line;
- and
- a sense amplifier connected to the second line that detects a signal on the second line,
- wherein the first predetermined potential of the line varies in accordance with a current flowing through the memory cell, and the first transistor flows a current in accordance with the varied potential of the line.
7 more elements
Dependencies are inferred from the claim text.