Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device comprising:

• a semiconductor substrate comprising a first region and a second region;
• a memory cell array comprising:
• a plurality of memory cell blocks comprising a plurality of memory cells;
• a plurality of wordlines connected to the memory cells of the memory cell blocks;
• and
• a bitline pair connected to the memory cell blocks comprising a readout bitline and a reference bitline;
• an amplifier connected to the bitline pair configured to amplify a signal difference therebetween;
• and
• a reference voltage generator comprising:
• a first dummy cell comprising a first paraelectric capacitor comprising a first terminal connected to a first dummy plate comprising a first dummy plate voltage according to temperatures of the first and the second regions and a second terminal connected to the reference bitline of the bitline pair;
• and
• a second dummy cell comprising a second paraelectric capacitor comprising a second dummy plate voltage according to an array voltage and a second terminal connected to the reference bitline of the bitline pair.

A nonvolatile semiconductor memory device comprising:

• a memory cell array comprising:
• a memory cell;
• a word line connected to the memory cell;
• a readout bitline connected to the memory cell;
• and
• a reference bitline;
• an amplifier connected to the readout bitline and the reference bitline configured to amplify a signal difference between the readout bitline and the reference bitline;
• and
• a reference voltage generator comprising:
• a first dummy cell having the same configuration as the memory cell comprising a first terminal connected to a first dummy plate line and a second terminal connected to the reference bitline;
• and
• a second dummy cell comprising a paraelectric capacitor comprising a first terminal connected to a second dummy plate line and a second terminal connected to the reference bitline.