Semiconductor memory device including a reference cell

A semiconductor memory device, comprising:

• a plurality of cell arrays, each cell array including a plurality of word lines, a plurality of bit lines disposed to overlap the word lines, and a plurality of cells electrically connected between the word lines and bit lines, respectively, one portion of the cell arrays forming a memory cell array that has said cells as memory cells, and another portion of the cell arrays forming a reference cell array that has said cells as reference cells;
• a decoder provided to each said cell array and operative to select a said cell;
• and
• a sense amplifier circuit operative to detect and compare a current or a voltage of said memory cell and reference cell selected by said decoder, and thereby read data of said memory cell,
• wherein, during data read, said decoder provided to said reference cell array selects a predetermined reference cell so that a relative position of the selected reference cell with respect to the decoder for said reference cell array is the same as the relative position of the selected memory cell with respect to the decoder for said memory cell array, and
• wherein said memory cell array and reference cell array have an identical structure.

A semiconductor memory device, comprising:

• a plurality of cell arrays including a plurality of word lines, a plurality of bit lines disposed to overlap the word lines, and a plurality of cells connected between the word lines and bit lines;
• a cell selection circuit operative to select as a memory cell a said cell whose data is to be read, and to select as a reference cell another said cell such that a reference current pathway of selected said reference cell has an equivalent resistance to a read current pathway of selected said memory cell;
• and
• a sense amplifier circuit operative to detect and compare a current or a voltage of said selected memory cell with a current and a voltage of said selected reference cell, and thereby read data of said memory cell,
• wherein said memory cell belongs to a predetermined said cell array that is a memory cell array,
• wherein said reference cell belongs to a predetermined said cell array that is a reference cell array and which is different to said memory cell array,
• wherein said memory cell array and reference cell array have an identical structure,
• wherein a relative position of a reference cell selected in said reference cell array is equal to a relative position of a memory cell selected in said memory cell array, and
• wherein said reference cell stores an intermediate value of two physical amounts stored as data by said memory cell.