Controlled ESR decoupling capacitor

A circuit board and electronic component combination, comprising a multilayer land grid feedthrough vertically-oriented ceramic capacitor mounted on a multilayer printed circuit board, for effective filtering capabilities for signal level lines and decoupling of power level lines or circuit planes, and for providing controlled equivalent series resistance of such electronic component, such combination comprising:

• a plurality of first electrode layers, each first electrode layer comprising a first insulative layer having first and second surfaces thereof bounded by four edges and a first conductive layer covering a portion of said first surface of said first insulative layer and having a main electrode area and at least one extended length tab connection extending from said first conductive layer main electrode area to at least one edge of said first insulative layer first surface;
• a plurality of second electrode layers alternately stacked with said plurality of first electrode layers and comprising mirror images thereof, each second electrode layer comprising a second insulative layer having first and second surfaces thereof bounded by four edges and a second conductive layer covering a portion of said first surface of said second insulative layer and having a main electrode area and at least one extended length tab connection extending from said second conductive layer main electrode area to at least one edge of said second insulative layer first surface;
• first conductive termination layer material covering portions of said first electrode layers and electrically connecting said first conductive layer of each of said plurality of first electrode layers;
• second conductive termination layer material covering portions of said second insulative layer and electrically connecting said second conductive layer of each of said plurality of second electrode layers;
• a plurality of conductive traces formed on a same side of said circuit board, and configured so as to respectively engage said first conductive termination layer material and said second conductive termination layer material;
• a first conductive plane formed in said circuit board;
• a second conductive plane formed in said circuit board;
• and
• a plurality of conductive vias formed through said circuit board and configured to couple respectively said respective first and second conductive termination layer materials with said conductive planes formed in said circuit board;
• wherein said first conductive layer material comprises one of a power or signal path;
• said second conductive layer material comprises a ground plane;
• said at least one extended length tab connections of said respective first and second conductive layers are selectively configured so as to selectively establish the effective length of respective paths to such respective conductive layers, whereby a current path is formed from said first conductive termination layer through said plurality of first electrode layers and plurality of second electrode layers to said second conductive termination layer which cooperates with said circuit board for forming respective current pathways having controlled equivalent series resistance for said component;
• said circuit board and electronic component combination further comprises at least one edge tab portion formed on each of said respective insulative layers and electrically isolated from said main electrode area of said respective first and second conductive layers with which it is associated, and which are selectively configured so as to respectively extend along at least one edqe of said insulative layer first surface with which it is associated, each of said tab portions providing an edge nucleation area for formation of termination material thereat;
• and
• each of said at least one edge tab portion is respectively electrically connected in parallel with said at least one extended length tab connection of said insulative layer first surface with which it is associated, so as to relatively lower the equivalent resistance of such extended length tab connection.

A multilayer land grid feedthrough vertically-oriented ceramic capacitor for mounting on a multilayer printed circuit board, for effective filtering capabilities for signal level lines and decoupling of power level lines or circuit planes, for providing controlled equivalent series resistance, and for providing low equivalent series inductance by employing current canceling techniques, such combination further including:

• a plurality of first electrode layers, each first electrode layer comprising a first insulative layer having first and second surfaces thereof bounded by four edges and a first conductive layer covering a portion of said first surface of said first insulative layer and having a main electrode area and at least one extended length tab connection extending from said first conductive layer main electrode area to at least one edge of said first insulative layer first surface;
• a plurality of second electrode layers alternately stacked with said plurality of first electrode layers and comprising mirror images thereof, each second electrode layer comprising a second insulative layer having first and second surfaces thereof bounded by four edges and a second conductive layer covering a portion of said first surface of said second insulative layer and having a main electrode area and at least one extended length tab connection extending from said second conductive layer main electrode area to at least one edge of said second insulative layer first surface;
• first conductive termination layer material covering portions of said first electrode layers and electrically connecting said first conductive layer of each of said plurality of first electrode layers;
• and
• second conductive termination layer material covering portions of said second insulative layer and electrically connecting said second conductive layer of each of said plurality of second electrode layers;
• wherein said at least one extended length tab connections of said respective first and second conductive layers are selectively configured so as to selectively establish the effective length of respective paths to such respective conductive layers, whereby a current path is formed from said first conductive termination layer through said plurality of first electrode layers and plurality of second electrode layers to said second conductive termination layer which cooperates with an associated circuit board for forming respective current pathways having controlled equivalent series resistance for said component;
• said first conductive termination layer material and said second conductive termination layer material are configured so as to form a gap therebetween along a portion of said at least one edge of both said first and second electrode layers, whereby said current path includes a current loop area formed from said first conductive termination layer through said plurality of first electrode layers and plurality of second electrode layers to said second conductive termination layer which cooperates with an associated circuit board for forming respective current cancellation pathways, for lowering equivalent series inductance of said component;
• terminal layer material spacing is minimized at said gap so as to provide reduction in equivalent series inductance of said component as said gap is reduced;
• said capacitor further comprises at least one edge tab portion formed on each of said respective insulative layers and electrically isolated from said main electrode area of said respective first and second conductive layers with which it is associated, and which are selectively configured so as to respectively extend along at least one edge of said insulative layer first surface with which it is associated, each of said tab portions providing an edge nucleation area for formation of termination material thereat;
• and
• each of said at least one edge tab portion is respectively electrically connected in parallel with said at least one extended length tab connection of said insulative layer first surface with which it is associated, so as to relatively lower the equivalent resistance of such extended length tab connection.

A method of making a multilayer electronic component, comprising:

• providing a plurality of first electrode layers, each first electrode layer comprising a first insulative layer having first and second surfaces thereof bounded by four edges and a first conductive layer covering a portion of said first surface of said first insulative layer and having a main electrode area and at least one extended length tab connection extending from said first conductive layer main electrode area to at least one edge of said first insulative layer first surface;
• providing a plurality of second electrode layers comprising mirror images of said plurality of first electrode layers, each second electrode layer comprising a second insulative layer having first and second surfaces thereof bounded by four edges and a second conductive layer covering a portion of said first surface of said second insulative layer and having a main electrode area and at least one extended length tab connection extending from said second conductive layer main electrode area to at least one edge of said second insulative layer first surface;
• positioning said first and second electrode layers in respective alternating layers;
• providing first conductive termination layer material covering portions of said first electrode layers and electrically connecting said first conductive layer of each of said plurality of first electrode layers;
• providing second conductive termination layer material covering portions of said second insulative layer and electrically connecting said second conductive layer of each of said plurality of second electrode layers;
• selectively configuring said at least one extended length tab connections of said respective first and second conductive layers so as to selectively establish the effective length of respective paths to such respective conductive layers, so that a current path is formed from said first conductive termination layer through said plurality of first electrode layers and plurality of second electrode layers to said second conductive termination layer which cooperates with an associated circuit board for forming respective current pathways having controlled equivalent series resistance for said component;
• and
• forming at least one edge tab portion on each of said respective insulative layers and electrically isolated from said main electrode area of said respective first and second conductive layers with which it is associated, and which are selectively configured so as to respectively extend along at least one edge of said insulative layer first surface with which it is associated, each of said tab portions providing an edge nucleation area for formation of termination material thereat;
• wherein said forming at least one edge tab portion includes selectively configuring each of such edge tab portions so as to be respectively electrically connected in parallel with said at least one extended length tab connection of said insulative layer first surface with which it is associated, so as to relatively lower the equivalent resistance of such extended length tab connection.

A method of making a circuit board and electronic component combination, comprising a multilayer land grid feedthrough vertically-oriented ceramic capacitor mounted on a multilayer printed circuit board, for effective filtering capabilities for signal level lines and decoupling of power level lines or circuit planes, and for providing controlled equivalent series resistance of such electronic component, such combination comprising:

• providing a plurality of first electrode layers, each first electrode layer comprising a first insulative layer having first and second surfaces thereof bounded by four edges and a first conductive layer covering a portion of said first surface of said first insulative layer and having a main electrode area and at least one extended length tab connection extending from said first conductive layer main electrode area to at least one edge of said first insulative layer first surface;
• providing a plurality of second electrode layers comprising mirror images of said first electrode layers, each second electrode layer comprising a second insulative layer having first and second surfaces thereof bounded by four edges and a second conductive layer covering a portion of said first surface of said second insulative layer and having a main electrode area and at least one extended length tab connection extending from said second conductive layer main electrode area to at least one edge of said second insulative layer first surface;
• positioning said first and second electrode layers in respective alternating layers;
• providing first conductive termination layer material covering portions of said first electrode layers and electrically connecting said first conductive layer of each of said plurality of first electrode layers;
• providing second conductive termination layer material covering portions of said second insulative layer and electrically connecting said second conductive layer of each of said plurality of second electrode layers;
• forming a plurality of conductive traces on a same side of said circuit board, and configured so as to respectively engage said first conductive termination layer material and said second conductive termination layer material;
• forming a first conductive plane in said circuit board;
• forming a second conductive plane in said circuit board;
• forming a plurality of conductive vias through said circuit board and configured to couple respectively said respective first and second conductive termination layer materials with said conductive planes formed in said circuit board;
• providing said first conductive layer material as one of a power or signal path;
• providing said second conductive layer material as a ground plane;
• selectively configuring said at least one extended length tab connections of said respective first and second conductive layers so as to selectively establish the effective length of respective paths to such respective conductive layers, so that a current path is formed from said first conductive termination layer through said plurality of first electrode layers and plurality of second electrode layers to said second conductive termination layer which cooperates with said circuit board for forming respective current pathways having controlled equivalent series resistance for said component;
• and
• forming at least one edge tab portion on each of said respective insulative layers and electrically isolated from said main electrode area of said respective first and second conductive layers with which it is associated, and which are selectively configured so as to respectively extend along at least one edge of said insulative layer first surface with which it is associated, each of said tab portions providing an edge nucleation area for formation of termination material thereat;
• wherein said forming at least one edge tab portion includes selectively configuring each of such edge tab portions so as to be respectively electrically connected in parallel with said at least one extended length tab connection of said insulative layer first surface with which it is associated, so as to relatively lower the equivalent resistance of such extended length tab connection.