Thin film transistor substrate, liquid crystal panel and liquid crystal display device using the same

A thin film transistor (TFT) substrate, comprising:

• a base;
• a plurality of scan lines disposed on the base;
• a plurality of data lines disposed on the base;
• and
• a pixel unit disposed on the base, wherein the pixel unit comprises:
• a thin film transistor, comprising a source and a drain;
• and
• a pixel electrode electrically connected to the drain via a contact hole, wherein the pixel electrode comprises a first main electrode, a second main electrode and a plurality of branch electrodes, the branch electrodes being connected to the first main electrode and/or the second main electrode, wherein the contact hole is located adjacent to an edge of the pixel electrode;
• wherein the scan lines comprise a first scan line and a second scan line, the data lines comprise a first data line and a second data line, and
• the TFT substrate further comprises:
• at least a first electrode disposed on the base and positioned between the first scan line and the second scan line;
• a first insulating layer covering the first scan line, the second scan line and the first electrode, wherein the first data line and the second data line are respectively perpendicular to the first scan line and the second scan line and are disposed on the first insulating layer, and the pixel electrode is positioned between the first data line and the second data line;
• a second electrode disposed on the first insulating layer and positioned on the first electrode to form a storage capacitor with the first electrode;
• and
• a second insulating layer, having at least one first through hole, disposed between the pixel electrode and the first data line, the second data line, the thin film transistor, and the second electrode, wherein the pixel electrode is connected to the second electrode via the at least one first through hole of the second insulating layer.

A liquid crystal panel, comprising:

• a first substrate;
• a second substrate disposed under the first substrate, comprising:
• a base;
• a plurality of scan lines disposed on the base;
• a plurality of data lines disposed on the base;
• and
• a pixel unit disposed on the base, the pixel unit comprising:
• a thin film transistor (TFT) comprising a source and a drain;
• and
• a pixel electrode electrically connected to the drain via a connecting portion, wherein the pixel electrode comprises a first main electrode, a second main electrode and a plurality of branch electrodes, the branch electrodes being connected to the first main electrode and/or the second main electrode, and wherein the connection portion and the branch electrodes are substantially not overlapped;
• and
• a liquid crystal layer sealed between the first substrate and the second substrate;
• wherein the scan lines comprise a first scan line and a second scan line, the data lines comprise a first data line and a second data line, and
• the second substrate further comprises:
• at least a first electrode disposed on the base and positioned between the first scan line and the second scan line;
• a first insulating layer covering the first scan line, the second scan line and the first electrode, wherein the first data line and the second data line are respectively perpendicular to the first scan line and the second scan line and are disposed on the first insulating layer, and the pixel electrode is positioned between the first data line and the second data line;
• a second electrode disposed on the first insulating layer and positioned on the first electrode to form a storage capacitor with the first electrode;
• and
• a second insulating layer, having at least one first through hole, disposed between the pixel electrode and the first data line, the second data line, the thin film transistor, and the second electrode, wherein the pixel electrode is connected to the second electrode via the at least one first through hole of the second insulating layer.

A liquid crystal panel, comprising:

• a first substrate;
• a second substrate disposed under the first substrate, comprising:
• a base;
• a plurality of scan lines disposed on the base;
• a plurality of data lines disposed on the base;
• and
• a pixel unit disposed on the base, the pixel unit comprising:
• a thin film transistor (TFT) comprising a source and a drain;
• and
• a pixel electrode electrically connected to the drain via a contact hole, wherein the pixel electrode comprises a first main electrode, a second main electrode and a plurality of branch electrodes, the branch electrodes being connected to the first main electrode and/or the second main electrode, wherein the contact hole is located adjacent to an edge of the pixel electrode;
• and
• a liquid crystal layer sealed between the first substrate and the second substrate;
• wherein the scan lines comprise a first scan line and a second scan line, the data lines comprise a first data line and a second data line, and
• the second substrate further comprises:
• at least a first electrode disposed on the base and positioned between the first scan line and the second scan line;
• a first insulating layer covering the first scan line, the second scan line and the first electrode, wherein the first data line and the second data line are respectively perpendicular to the first scan line and the second scan line and are disposed on the first insulating layer, and the pixel electrode is positioned between the first data line and the second data line;
• a second electrode disposed on the first insulating layer and positioned on the first electrode to form a storage capacitor with the first electrode;
• and
• a second insulating layer, having at least one first through hole, disposed between the pixel electrode and the first data line, the second data line, the thin film transistor, and the second electrode, wherein the pixel electrode is connected to the second electrode via the at least one first through hole of the second insulating layer.