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US 8,045,028 B1Granted
Six transistor (6T) pixel architecture
AssigneeON Semiconductor Trading, Ltd.
InventorYannick De Wit
Life of this patent
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Abstract
A pixel having a high voltage DC supply being replaced by a pulsed signal high voltage supply that is coupled to one of the plates of a memory capacitor in the pixel.
Claims20
A pixel, comprising:
- a controllable high voltage supply node;
- a reset transistor and a first source follower transistor each having a drain electrode;
- and
- a memory capacitor having a first plate coupled to the controllable high voltage supply node and to the drain of one of the reset transistor and the first source follower transistor.
1 more element
A method of operating a pixel, having a controllable high voltage supply node coupled to a memory capacitor, comprising:
- coupling one of a reset transistor and a first source follower transistor to the controllable high voltage supply node;
- placing the pixel in either a hard reset mode or a hard-soft reset mode;
- and
- pulsing a plurality of different voltages on the controllable high voltage supply node coupled to the memory capacitor.
1 more element
An apparatus, comprising:
- a pixel having a plurality of transistors and a memory capacitor;
- means for coupling drains of the plurality of transistors and the memory capacitor to a high voltage supply node;
- and
- means for controlling the high voltage supply node to transition between a plurality of voltage levels.
1 more element
Dependencies are inferred from the claim text.