Semiconductor device including correction parameter generator and method of generating correction parameters

A display apparatus comprising:

• a display panel;
• a semiconductor device comprising:
• an address generator configured to generate a plurality of addresses based on only a first number of most significant bits of a current pixel value and only a second number of most significant bits of a previous pixel value,
• wherein the first number of most significant bits is distinct from a third number of least significant bits of the current pixel value and one bit of the first number of most significant bits is a first selection bit,
• wherein the second number of most significant bits is distinct from a fourth number of least significant bits of the previous pixel value and one bit of the second number of most significant bits is a second selection bit,
• wherein the addresses are based on first sub-addresses generated from shifting the first number of most significant bits, second sub-addresses generated from adding one to the first number of most significant bits and shifting the result, third sub-addresses generated from the second number of most significant bits, and fourth sub-addresses generated from adding one to the second number of most significant bits;
• an output unit configured to determine correction parameters, which respectively correspond to the plurality of addresses, in response to the plurality of addresses, to select an index pattern from a plurality of index patterns in response to the first selection bit and the second selection bit, and to arrange the determined correction parameters into the selected index pattern to output arranged correction parameters;
• and
• a controller to control input and output of the current pixel, the previous pixel and the correction parameters between the semiconductor device and the display panel,
• wherein the index pattern is a pattern that can be generated according to positions of the determined correction parameters in a look-up table including the plurality of indexes.

A method of generating correction parameters, comprising:

• generating a plurality of addresses based on only a first number of most significant bits of a current pixel value and only a second number of most significant bits of a previous pixel value,
• wherein one of the first most significant bits is a first selection bit and one of the second most significant bits is a second selection bit;
• determining correction parameters, which respectively correspond to the plurality of addresses, in response to the plurality of addresses;
• selecting an index pattern from a plurality of index patterns in response to the first selection bit and the second selection bit;
• arranging the determined correction parameters into the selected index pattern to generate arranged correction parameters;
• and
• outputting the arranged correction parameters,
• wherein the index pattern is a pattern that can be generated according to positions of the determined correction parameters in a look-up table including the plurality of indexes,
• wherein the first number of most significant bits is distinct from a third number of least significant bits of the current pixel value,
• wherein the second number of most significant bits is distinct from a fourth number of least significant bits of the previous pixel value.

A program storage device readable by machine, tangibly embodying a non-transitory computer readable medium for storing a program of instructions executable by the machine to perform method steps for generating correction parameters, the method steps comprising:

• generating a plurality of addresses based on only a first number of most significant bits of a current pixel value and only a second number of most significant bits of a previous pixel,
• wherein one of the first most significant bits is a first selection bit and one of the second most significant bits is a second selection bit;
• determining correction parameters, which respectively correspond to the plurality of addresses, in response to the plurality of addresses;
• selecting one index pattern from a plurality of index patterns in response to the first selection bit and the second selection bit;
• arranging the determined correction parameters into the selected index pattern to generate arranged correction parameters;
• and
• outputting the arranged correction parameters,
• wherein the index pattern is a pattern that can be generated according to positions of the determined correction parameters in a look-up table including the plurality of indexes,
• wherein the first number of most significant bits is distinct from a third number of least significant bits of the current pixel value,
• wherein the second number of most significant bits is distinct from a fourth number of least significant bits of the previous pixel value.