Capacitor switching circuit

An oscillator tuning block comprising:

• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain, wherein the first transistor and the second transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the second drain to a second control signal;
• a fourth resistor connecting the first source to the second control signal;
• and
• a fifth resistor connecting the second source and the first drain to the second control signal;
• wherein:
• the second control signal is a level-shifted compliment of the first control signal;
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and a ground potential;
• the first control signal switches between substantially the VDD and substantially one half of the VDD;
• and
• the second control signal switches between substantially the ground potential and substantially the VDD.

An oscillator comprising a negative transconductance block, an inductor, and a tuning block comprising:

• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain, wherein the first transistor and the second transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the second drain to a second control signal;
• a fourth resistor connecting the first source to the second control signal;
• and
• a fifth resistor connecting the second source and the first drain to the second control signal;
• wherein:
• the second control signal is a level-shifted compliment of the first control signal;
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and a ground potential;
• the first control signal switches between substantially the VDD and substantially one half of the VDD;
• and
• the second control signal switches between substantially the ground potential and substantially the VDD.

A transceiver comprising a receiver and a transmitter, wherein at least one of the receiver and the transmitter comprises:

• an oscillator comprising a negative transconductance block, an inductor, and a tuning block, the tuning block comprising:
• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain, wherein the first transistor and the second transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the second drain to a second control signal;
• a fourth resistor connecting the first source to the second control signal;
• and
• a fifth resistor connecting the second source and the first drain to the second control signal;
• wherein:
• the second control signal is a level-shifted compliment of the first control signal;
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and a ground potential;
• the first control signal switches between substantially the VDD and substantially one half of the VDD;
• and
• the second control signal switches between substantially the ground potential and substantially the VDD.

An access terminal comprising a transceiver comprising:

• a receiver;
• and
• a transmitter,
• wherein at least one of the receiver and the transmitter comprises:
• an oscillator comprising a negative transconductance block, an inductor, and a tuning block, the tuning block comprising:
• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain, wherein the first transistor and the second transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the second drain to a second control signal;
• a fourth resistor connecting the first source to the second control signal;
• and
• a fifth resistor connecting the second source and the first drain to the second control signal;
• wherein:
• the second control signal is a level-shifted compliment of the first control signal;
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and a ground potential;
• the first control signal switches between substantially the VDD and substantially one half of the VDD;
• and
• the second control signal switches between substantially the ground potential and substantially the VDD.

A capacitance switching element, comprising:

• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain;
• a third transistor comprising a third gate, a third source, and a third gate, wherein the first transistor, the second transistor, and the third transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the third gate to the first control signal;
• a fourth resistor connecting the third drain to a second control signal;
• a fifth resistor connecting the third source and the second drain to the second control signal;
• a sixth resistor connecting the second source and the first drain to the second control signal;
• and
• a seventh resistor connecting the first source to the second control signal;
• wherein:
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and ground potential;
• the first control signal is pulled up to substantially the VDD;
• and
• the second control signal switches between (1) substantially the ground potential to connect the first capacitor to the second capacitor, and (2) substantially one and a half times the VDD potential to disconnect the first capacitor from the second capacitor.

An oscillator tuning block comprising a switching element comprising:

• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain;
• a third transistor comprising a third gate, a third source, and a third gate, wherein the first transistor, the second transistor, and the third transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the third gate to the first control signal;
• a fourth resistor connecting the third drain to a second control signal;
• a fifth resistor connecting the third source and the second drain to the second control signal;
• a sixth resistor connecting the second source and the first drain to the second control signal;
• and
• a seventh resistor connecting the first source to the second control signal;
• wherein:
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and ground potential;
• the first control signal is pulled up to substantially the VDD;
• and
• the second control signal switches between (1) substantially the ground potential to connect the first capacitor to the second capacitor, and (2) substantially one and a half times the VDD potential to disconnect the first capacitor from the second capacitor.

An oscillator comprising:

• a negative transconductance block;
• and
• a tank circuit,
• wherein the tank circuit comprises an inductor and a tuning block, the tuning block comprising:
• a switching element comprising:
• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain;
• a third transistor comprising a third gate, a third source, and a third gate, wherein the first transistor, the second transistor, and the third transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the third gate to the first control signal;
• a fourth resistor connecting the third drain to a second control signal;
• a fifth resistor connecting the third source and the second drain to the second control signal;
• a sixth resistor connecting the second source and the first drain to the second control signal;
• and
• a seventh resistor connecting the first source to the second control signal;
• wherein:
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and ground potential;
• the first control signal is pulled up to substantially the VDD;
• and
• the second control signal switches between (1) substantially the ground potential to connect the first capacitor to the second capacitor and, (2) substantially one and a half times the VDD potential to disconnect the first capacitor from the second capacitor.

A transceiver comprising a receiver and a transmitter, wherein at least one of the receiver and the transmitter comprises an oscillator comprising:

• a negative transconductance block;
• and
• a tank circuit,
• wherein the tank circuit comprises an inductor and a tuning block, the tuning block comprising:
• a switching element comprising:
• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain;
• a third transistor comprising a third gate, a third source, and a third gate, wherein the first transistor, the second transistor, and the third transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the third gate to the first control signal;
• a fourth resistor connecting the third drain to a second control signal;
• a fifth resistor connecting the third source and the second drain to the second control signal;
• a sixth resistor connecting the second source and the first drain to the second control signal;
• and
• a seventh resistor connecting the first source to the second control signal;
• wherein:
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and ground potential;
• the first control signal is pulled up to substantially the VDD;
• and
• the second control signal switches between (1) substantially the ground potential to connect the first capacitor to the second capacitor, and (2) substantially one and a half times the VDD potential to disconnect the first capacitor from the second capacitor.

An access terminal comprising a transceiver comprising:

• a receiver;
• and
• a transmitter,
• wherein at least one of the receiver and the transmitter comprises an oscillator comprising:
• a negative transconductance block;
• and
• a tank circuit,
• wherein the tank circuit comprises an inductor and a tuning block, the tuning block comprising:
• a switching element comprising:
• a first capacitor;
• a second capacitor;
• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain;
• a third transistor comprising a third gate, a third source, and a third gate, wherein the first transistor, the second transistor, and the third transistor are coupled in series between the first capacitor and the second capacitor;
• a first resistor connecting the first gate to a first control signal;
• a second resistor connecting the second gate to the first control signal;
• a third resistor connecting the third gate to the first control signal;
• a fourth resistor connecting the third drain to a second control signal;
• a fifth resistor connecting the third source and the second drain to the second control signal;
• a sixth resistor connecting the second source and the first drain to the second control signal;
• and
• a seventh resistor connecting the first source to the second control signal;
• wherein:
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and ground potential;
• the first control signal is pulled up to substantially the VDD;
• and
• the second control signal switches between (1) substantially the ground potential to connect the first capacitor to the second capacitor, and (2) substantially one and a half times the VDD potential to disconnect the first capacitor from the second capacitor.

A capacitance switching element, comprising:

• a first capacitor;
• a second capacitor;
• a plurality of n transistors, n being at least three, each transistor of the plurality of n transistors comprising a gate, a source, and a drain, wherein the n transistors are coupled in series between the first capacitor and the second capacitor;
• a first plurality of resistors connecting the gates of the transistors to a first control signal;
• and
• a second plurality of resistors connecting the drains and sources of the transistors to a second control signal,
• wherein:
• the capacitance switching element is configured to operate from a power supply configured to deliver a supply voltage potential (VDD) and a ground potential;
• the first control signal switches between substantially the VDD and substantially ((n−1)/2) times the VDD;
• and
• the second control signal switches between substantially the ground potential and substantially (n/2) times the VDD potential.

A method of switching capacitance, the method comprising:

• providing a first capacitor and a second capacitor;
• providing a first transistor and a second transistor coupled in series between the first capacitor and the second capacitor;
• biasing gates of the first and second transistors at substantially a supply voltage VDD and biasing sources and drains of the first and second transistors at substantially ground potential to connect the first capacitor to the second capacitor;
• and
• biasing the gates of the first and second transistors at substantially one half of the VDD and biasing the sources and drains of the first and second transistors at substantially the VDD to disconnect the first capacitor from the second capacitor.

A method of switching capacitance, the method comprising:

• providing a first capacitor and a second capacitor;
• providing a plurality of n transistors, n being at least three, wherein the transistors of the plurality of transistors are coupled in series between the first capacitor and the second capacitor;
• biasing gates of each transistor of the plurality of transistors at substantially a supply voltage VDD and biasing sources and drains of said each transistor at substantially ground potential to connect the first capacitor to the second capacitor;
• and
• biasing the gates at substantially ((n−1)/2) times VDD and biasing the sources and drains at substantially (n/2) times VDD to disconnect the first capacitor from the second capacitor.

A capacitance switching element, comprising:

• a first capacitor;
• a second capacitor;
• a first transistor;
• a second transistor, wherein the first transistor and the second transistor are coupled in series between the first capacitor and the second capacitor;
• means for biasing gates of the first and second transistors at substantially a supply voltage VDD and for biasing sources and drains of the first and second transistors at substantially ground potential to connect the first capacitor to the second capacitor;
• and
• means for biasing the gates of the first and second transistors at substantially one half of the VDD and for biasing the sources and drains of the first and second transistors at substantially the VDD to disconnect the first capacitor from the second capacitor.

A capacitance switching element, comprising:

• a first capacitor;
• a second capacitor;
• a plurality of n transistors, n being at least three, wherein the transistors of the plurality of transistors are coupled in series between the first capacitor and the second capacitor;
• means for biasing gates of each transistor of the plurality of transistors at substantially a supply voltage VDD and biasing sources and drains of said each transistor at substantially ground potential to connect the first capacitor to the second capacitor;
• and
• means for biasing the gates at substantially ((n−1)/2) times VDD and biasing the sources and drains at substantially (n/2) times VDD to disconnect the first capacitor from the second capacitor.