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US 8,044,694 B2Granted
Semiconductor integrated circuit having latch circuit applied changeable capacitance and method thereof
AssigneeRenesas Electronics Corporation
InventorJunji Monden
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit includes a flip-flop circuit, a capacitive element, and a switch circuit. The switch circuit includes a first switch circuit which couples the capacitive element to two nodes of the flip-flop circuit at a first timing, and a second switch circuit which short-circuits ends of the capacitive element connected to the two nodes at a second timing different from the first timing.
Claims20
A semiconductor integrated circuit, comprising:
- a first inverter circuit which logically inverts a supplied signal and outputs a first inverted signal;
- a second inverter circuit which logically inverts the first inverted signal output from the first inverter circuit and outputs a second inverted signal;
- a pass-through/latch selector circuit which electrically connects an output end of the second inverter circuit and an input end of the first inverter circuit with each other at a time of latching, and which electrically shuts off the output end of the second inverter circuit and the input end of the first inverter circuit from each other at a time of pass-through;
- a capacitive element which includes a first end and a second end, which increases a charge capacity at an output end of the first inverter circuit when the first end is connected to the output end of the first inverter circuit, and which increases a charge capacity at the output end of the second inverter circuit when the second end is connected to the output end of the second inverter circuit;
- and
- a malfunction-preventing selector circuit which electrically connects the first end and the second end respectively to the output end of the first inverter circuit and the output end of the second inverter circuit at the time of latching, and which connects the first end and the second end with each other so that voltages at the first and second ends are equalized at the time of pass-through.
3 more elements
A semiconductor integrated circuit, comprising:
- a flip-flop circuit including a first node and a second node;
- a capacitive element including a third node and a fourth node;
- and
- a switch circuit coupled between the flip-flop circuit and the capacitive element, the switch circuit including:
- a first switch circuit configured to couple the third and the fourth nodes to the first and the second nodes at a first timing;
- and
- a second switch circuit configured to couple the third node with the fourth node at a second timing different from the first timing.
4 more elements
A method of preventing a malfunction in a semiconductor integrated circuit, including:
- a first inverter circuit which logically inverts a supplied signal and outputs a first inverted signal from an output end thereof;
- a second inverter circuit which logically inverts the first inverted signal and outputs a second inverted signal;
- a pass-through/latch selector circuit which electrically connects an output end of the second inverter circuit and an input end of the first inverter circuit with each other at a time of latching, and which electrically shuts off the output end of the second inverter circuit and the input end of the first inverter circuit from each other at a time of pass-through;
- and
- a capacitive element which increases an electrical capacity at the output end of the first inverter circuit and at the output end of the second inverter circuit at the time of latching, the method comprising:
- connecting a first end of the capacitive element to the output end of the first inverter circuit and a second end of the capacitive element to the output end of the second inverter circuit at the time of latching;
- and
- connecting the first end and the second end with each other so that voltages at first and second ends are equalized at the time of pass-through.
5 more elements
Dependencies are inferred from the claim text.