US 8,044,690 B2 · System and method for clock-synchronized triangular waveform generation

Abstract

A triangular waveform generator is converted to a free running oscillator controlled by a calibration code. The free running oscillator can be synchronized to an external clock signal by comparing the external clock frequency to the frequency of the triangular waveform and adjusting the calibration code until the discrepancy in frequency is minimized.

Drawings

Claims23

Dependent claims

In a pulse modulator, a calibrated synchronized triangular waveform generator comprising:

a triangular waveform generator including a clock input for receiving a clock signal and a calibration code input for receiving a calibration code signal, the triangular waveform generator operable to output a triangular waveform in response to the received clock signal and calibration code signal;
a digital pulse generator configured to receive the triangular waveform and produce an internally generated clock signal sharing essentially a common frequency with the triangular waveform;
a calibration circuit operable to adjust the calibration code signal by comparing a frequency of an external clock signal and the frequency of the internally generated clock signal during calibration;
and
clock selection circuitry selectively providing either the internally generated clock signal or the external clock signal to the clock input, wherein the internally generated clock signal is selected during calibration.

2 more elements

A method of generating a triangular waveform synchronized to an external clock signal comprising:

generating a triangular waveform having a voltage on the basis of a calibration code signal and a clock signal;
during calibration, selecting an internally generated clock signal as the clock signal;
during calibration, generating the internally generated clock signal wherein the internally generated clock signal and the generated triangular waveform essentially share a common frequency;
during calibration, adjusting the calibration code signal on the basis of the external clock signal and the internally generated clock signal;
and
after calibration, freezing the calibration code signal;
wherein adjusting the calibration code signal comprises:
comparing a first number of cycles of the external clock signal with a second number of cycles of the internally clock signal;
and
refining an approximation to a calibration code on the basis of whether the first number is greater than the second number.

7 more elements

A calibrated triangular waveform generator synchronized to an external clock signal comprising:

means for generating a triangular waveform having a voltage on the basis of a calibration code signal and a clock signal;
means for selecting an internally generated clock signal as the clock signal;
means for generating the internally generated clock signal comprising:
means for comparing the voltage of the triangular waveform with a high bias voltage and forcing the internally generated clock signal into a low state when the voltage is greater than or equal to the high bias voltage;
and
means for comparing the voltage of the triangular waveform with a low bias voltage and forcing the internally generated clock signal into a high state when the voltage is less than or equal to the low bias voltage;
means for adjusting the calibration code signal on the basis of the external clock signal and the internally generated clock signal, the means for adjusting further comprising:
means for comparing a first number of cycles of the external clock signal with a second number of cycles of the internally clock signal;
and
means for refining an approximation to a calibration code on the basis of whether the first number is greater than the second number;
and
means for freezing the calibration code signal.

9 more elements

A waveform generator comprising:

a triangular waveform generator including a clock input for receiving a clock signal and a calibration code input for receiving a calibration code signal, the triangular waveform generator operable to output a triangular waveform in response to the received clock signal and calibration code signal;
a digital pulse generator configured to receive the triangular waveform and produce an internally generated clock signal sharing essentially a common frequency with the triangular waveform;
and
a calibration circuit operable to adjust the calibration code signal by comparing a frequency of an external clock signal and the frequency of the internally generated clock signal during calibration, the calibration circuit comprising:
a rate comparison circuit operable to compare a first number of cycles of the external clock signal and a second number of cycles of the internally clock signal;
a successive approximation register operable to adjust the calibration code on the basis of whether the first number is greater than the second number.

3 more elements

Dependencies are inferred from the claim text.

Description5,135 words

Summary911 words

#1. Field of the Invention

#The present invention relates generally to pulse width modulation (PWM) and class-D amplifiers and specifically to clock-synchronized triangular waveform generators.

#2. Related Art

Brief description of the drawings21 figures

#Many aspects of the disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.

#FIG. 1 is a block diagram illustrating the typical architecture of a class-D amplifier;

#FIG. 2 shows a typical PWM generator;

Detailed description3,870 words

#A detailed description of embodiments of the present invention is presented below. While the disclosure will be described in connection with these drawings, there is no intent to limit it to the embodiment or embodiments disclosed herein. On the contrary, the intent is to cover all alternatives, modifications, and equivalents included within the spirit and scope of the disclosure.

#FIG. 4 shows a synchronized triangular waveform generator. Triangular waveform generator 400 comprises fixed current source 402, fixed current source 404 and capacitor 410. Waveform generator 400 also comprises complementary switching circuits shown in this example by switch 406 and switch 408 which are switched in a complementary fashion such that when switch 406 is open, switch 408 is closed, and vice versa. A bias voltage is applied at 412 to triangular waveform generator 400. Switch 406 is controlled by signal SWr and switch 408 is controlled by signal SWf. As shown in FIG. 5, switch 406 is synchronized to a modulation clock signal such that when the clock signal is high switch 406 is closed and when the clock signal is low switch 406 is opened. Complementary switch 408 is opened when the clock signal is high and closed with the clock signal is low.

#When switch 406 is closed and switch 408 is open, current source 404 charges capacitor 410 linearly until the next clock transition. When the clock goes low, switch 408 closes and switch 406 opens, allowing current source 402 to discharge capacitor 410 linearly. With substantially equal charge and discharge times (i.e. the modulation clock has a 50% duty-cycle) and matched current sources (the current drawn by current source 402 is the same as the current driven by current source 404), the voltage at node 414 is bounded between a peak ramp voltage VRAMP—H and the bias voltage VBIAS.

Facts

Application

12/574,663Filed 6 Oct 2009

Published

US 2011/0080191 A17 Apr 2011

Granted

25 Oct 2011

Term ends

6 Nov 2029

Estimated · how

20 years from earliest known nonprovisional domestic filing plus recorded patent term adjustment, including 31 days of adjustment. Maintenance-fee lapses, terminal disclaimers and statutory extensions have not been checked. The continuity chain may be incomplete; this is not an enforceability determination.

Classification5 codes

H03F 3/217
With semiconductor devices only: class D power amplifiers; Switching amplifiers
H03K 4/06
Generating pulses having essentially a finite slope or stepped portions: having triangular shape
H03K 4/50
Using as active elements semiconductor devices: in which a sawtooth voltage is produced across a capacitor
H03F
Amplifiers

Timeline

6 Oct 2009Application filedUS 12/574,663
6 Oct 2009Assigned to The Bank of New York Trust Company, N.A.security agreement
6 Oct 2009Assigned to Conexant Systems, Inc.assignment of assignor's interest
2 Mar 2010Assigned to Conexant Systems, Inc.release of security interest
7 Jun 2010Assigned to The Bank of New York Mellon Trust Company, N.A.security agreement
7 Apr 2011PublishedUS 2011/0080191 A1
25 Oct 2011GrantedUS 8,044,690 B2
6 May 2016Assigned to Conexant Systems, Inc., Conexant, Inc., Conexant Systems Worldwide, Inc., Brooktree Broadband Holding, Inc.release of security interest
20 May 2016Assigned to Lakestar Semi Inc.change of name
23 May 2016Assigned to Conexant Systems, Inc.assignment of assignor's interest
26 Jun 2017Assigned to Conexant Systems, LLCchange of name
7 Sep 2017Assigned to Synaptics Incorporatedassignment of assignor's interest
27 Sep 2017Assigned to Wells Fargo Bank, National Associationsecurity interest
6 Jun 2022Assigned to Conexant Systems, Inc.corrective assignment to correct the the assignors names previously recorded at reel: 023334 frame: 0870. assignor(s) hereby confirms the assignment.
12 Oct 2026TodayWithin its term
6 Nov 2029Term endsEstimated, includes 31 days of adjustment

System and method for clock-synchronized triangular waveform generation

Life of this patent

System and method for clock-synchronized triangular waveform generation

Life of this patent

Life of this patent

Abstract

Drawings

Drawings

Claims23

Description5,135 words

Classification5 codes

Life of this patent

Description5,135 words

Drawings