Systems and methods for determining an out of band signal
AssigneeAgere Systems Inc.
InventorsMingdeng Chen, Ari Valero-Lopez, Weiwei Mao
Life of this patent
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Abstract
Various embodiments of the present invention provide systems and circuits that provide for out of band detection. As one example, an out of band detection circuit is disclosed that includes an input signal, a clock generation circuit, and a sampling circuit. The clock generation circuit receives the input signal and derives therefrom a sampling clock, and the sampling circuit is operable to sample the input signal at a time indicated by the sampling clock.
Claims24
An out of band detection circuit, the circuit comprising:
- a clock generation circuit coupled to an input using a capacitor, wherein the clock generation circuit is operable to receive an input signal via the input and to derive a sampling clock from the input signal, and wherein the clock generation circuit buffers the input signal to both delay the input signal and to generate a rail to rail recovered clock;
- and
- a sampling circuit, wherein the sampling circuit is operable to sample the input signal at a time indicated by the sampling clock.
A method for identifying an out of band condition, the method comprising:
- receiving an input signal;
- delaying the input signal;
- clocking a resettable flip flop using the delayed input signal, wherein the resettable flip flop is set;
- resetting the resettable flip flop using an output of the resettable flip flop, wherein setting an resetting the resettable flip flop yields a clock;
- sampling the input signal using the clock to create an input sample;
- comparing the input sample with a reference;
- and
- asserting an out of band signal based at least in part on a result of the comparison of the input sample with the reference.
A system for processing information, the system comprising:
- a transferring device, wherein the transferring device provides an input signal via a serial interface;
- and
- a receiving device, wherein the receiving device receives the input signal via the serial interface, wherein the receiving device includes an out of band detector with a clock generation circuit and a sampling circuit, and wherein the sampling circuit includes a switch operable to connect the input signal to a sampling capacitor.
An out of band detection circuit, the circuit comprising:
- a clock generation circuit operable to receive an input signal and to derive a sampling clock from the input signal, wherein the clock generation circuit is operable to buffer the input signal to both delay the input signal and to generate a rail to rail recovered clock, wherein the recovered clock is operable to cause a resettable flip flop to set, and wherein an output of the resettable flip flop is operable to reset the resettable flip flop;
- and
- a sampling circuit, wherein the sampling circuit is operable to sample the input signal at a time indicated by the sampling clock.
An out of band detection circuit, the circuit comprising:
- a clock generation circuit coupled to an input using a capacitor, wherein the clock generation circuit is operable to receive an input signal via the input and to derive a sampling clock from the input signal;
- and
- a sampling circuit, wherein the sampling circuit is operable to sample the input signal at a time indicated by the sampling clock, and wherein the sampling circuit includes a switch that is controlled by the sampling clock.
Dependencies are inferred from the claim text.