Method and apparatus for positioning and contacting singulated semiconductor dies
OwnerLajos Burgyaninventor
Life of this patent
Estimating the term…
Abstract
A re-configurable test socket system and test socket architecture are described involving a combination of particular micro elements and re-useable macro elements that can be reused and reconfigured for testing a wide variety of different semiconductor and integrated circuit (IC) DUT packages having different shapes, sizes, and terminal configurations.
Claims23
Elements of a re-configurable test socket system comprising, in combination:
- a) a test printed circuit board (PCB) having a particular planar microarray of electrically conductive, contactor traces on a presenting planar surface;
- b) an array of mounted guide-pins perpendicularly extending out from the presenting planar surface of the test printed circuit board (PCB) macroscopically located around the particular planar microarray of electrically conductive contactor traces;
- c) a DUT positioning frame with a flat top and bottom perimeter frame surrounding a particular, replaceable positioning cavity structure having a bottom well sized for receiving and microscopically positioning a particular, semiconductor/integrated circuit DUT, and having a macroscopic array of guide-pin holes orthogonally drilled through the flat frame, located and sized for snugly receiving the macroscopic array of extending guided pins wherein the particular DUT received within the positioning cavity of the DUT positioning frame, is oriented and located by the guide-pin holes through the frame receiving the guide-pins, seated on the presenting planar surface of the test printed circuit board (PCB) for presenting a microarray of contactors facing out from the bottom well oriented for electrical connection with at least two of the test microarray of contactor traces on the test printed circuit board (PCB);
- d) a Z-axis anisotropic conductive elastomeric sheet placed between the microarray of connector traces on the presenting planar surface of the test printed circuit board (PCB) and the microarray of contactors presented by the particular DUT for establishing electrical connections between the respective microarrays of test contactor traces on the presenting planar surface of the test printed circuit board (PCB) and contactors of the particular DUT;
- e) a clamping frame structure providing a throat housing with a flat bottom face and a macroscopic array of parallel guide-pin holes orthogonally penetrating into the bottom face of the frame structure located and coaxially sized for snugly receiving the macroscopic array of extending guide-pins for locating and positioning the throat housing in macroscopic registry around the particular microarray of contactor traces on the test printed circuit board (PCB);
- f) a releasable locking means anchored within the clamping frame structure for providing a holding force (FH) firmly securing the clamping frame structure to the test printed circuit board (PCB) with its bottom face seated on, and oriented parallel to the top and bottom faces of the DUT positioning frame;
- g) means mounted within the throat housing of the clamping frame structure for applying a force (FPA) for uniformly compressing the Z-axis anisotropic conductive elastomeric sheet between the test printed circuit board (PCB) and the particular DUT to establish electrical conductive paths between the microarray of connector traces on the test printed circuit board (PCB) and the microarray of connectors presented by the particular DUT where the holding force (FH) is greater than the force (FPA).
A technique for fabricating a particular, replaceable positioning cavity structure having a bottom well sized for receiving and microscopically positioning a particular, semiconductor/integrated circuit DUT within a DUT positioning frame comprising the steps of:
- a) drilling a macroscopic array of at least three guide-pin holes orthogonally though a wide flat perimeter frame of a DUT positioning frame symmetrically located relative to a center of a large opening defined within the perimeter frame corresponding, in position and orientation, and sized to snugly receive a macroscopic array of at least three guide-pins orthogonally extending out from a planar face of a test printed circuit board (PCB) symmetrically located relative to a center of a microarray of electrical contactor traces on a presenting surface of the planar face of the test printed circuit board (PCB);
- b) seating the flat perimeter frame of the DUT positioning frame on the planar face of the test printed circuit board (PCB) oriented by the guide-pins snugly received though the corresponding macroscopic array of guide-pin holes for macroscopically locating the large opening defined within the flat perimeter frame centrally around the microarray of contactor traces presented on the presenting surface of the test printed circuit board (PCB);
- c) creating a transparent replica of the particular DUT, duplicating a geometric pattern of images of a microarray of connectors presented on a planar face of that DUT,
- d) placing the transparent replica of the DUT on presenting surface of the test printed circuit board (PCB) within the large opening defined within the flat perimeter frame proximate the center of the large opening;
- e) microscopically manipulating, moving and orienting the transparent replica of the DUT to achieve a position of optimal optical registry with a geometric pattern presented by the microarray of contactors traces on the presenting surface of the test printed circuit board (PCB) and the geometric pattern of images of the microarray of connectors duplicated in the transparent replica;
- f) holding the transparent replica of the DUT to the planar face test printed circuit board (PCB) at the position of optimal registry of the geometric pattern presented by the microarray of contactors traces on the planar face test printed circuit board (PCB) and the geometric pattern of images of the microarray of connectors duplicated the transparent replica;
- g) filling the large opening defined within the perimeter frame corresponding with a micro-molding composition encasing the transparent replica of the DUT secured at the position of optimal registry;
- h) allowing micro-molding composition to set, and/or cure;
- i) lifting the DUT positioning frame up from and off the planar face of the test printed circuit board (PCB),
- j) removing the transparent replica of the DUT from the encasing set/cured micro-casting composition creating a bottom well opening out a bottom face of the DUT positioning frame for receiving and microscopically positioning the DUT on the testing printed circuit board (PCB) for measuring its I/O parameters.
A technique for optical aligning a planar, microarray of contactors traces presented on a planar presenting face of a planar test printed circuit board (PCB) and a particular central well of a positioning cavity of a DUT positioning frame, comprising the steps:
- a) inverting and securing a particular clamping frame structure having a throat housing with a flat bottom face and a macroscopic array of at least three parallel guide-pin holes orthogonally penetrating into the bottom face of the clamping frame structure for providing a stationary planar X-Y support platform;
- b) inserting a guide-pins coaxially each having a radius RP and having at least one annular ‘V’-groove proximate its respective extending distal tips respectively for snugly into each guide-pin hole penetrating into the bottom face of the clamping frame structure;
- c) releasably locking the clamping frame structure onto the tips of each guide-pin inserted into each guide-pin hole of the macroscopic array for aligning the annular ‘V’-groove proximate the extending distal tip of each pin in a reference plane elevated above and parallel to the X-Y support platform;
- d) drilling a corresponding macroscopic array of at least three guide-pin anchoring-holes orthogonally through a planar test printed circuit board (PCB) each having a radius RPCBH surrounding a planar microscopic array of contactors traces on a presenting face a test printed circuit board (PCB) where the radius RPCBH of each guide-pin anchoring hole in the macroscopic array is much greater than the radius RP of the corresponding guide-pin, i.e., RPCBH>RP;
- e) seating the planar test printed circuit board (PCB) on the X-Y support platform with the presenting face facing out from the platform loosely positioned and oriented in an X-Y plane on the X-Y platform by the macroscopic array of extending guide-pins received through the corresponding array of guide-pin anchoring-holes;
- f) making an exact, transparent replica of a particular semiconductor/integrated circuit DUT containing a geometric pattern of images of the microarray of contactors presented by the particular DUT;
- g) creating a bottom opening well with an open top, positioning cavity structure within a DUT positioning frame having a perimeter frame with flat top and bottom faces macroscopically surrounding the positioning cavity for snugly receiving and positioning the particular semiconductor/integrated circuit DUT;
- h) drilling a corresponding macroscopic array of at least three guide-pin holes orthogonally communicating through the perimeter frame of the DUT positioning frame each having a radius a RDPFH sized for snugly receiving a shank of a corresponding guide-pin in the macroscopic array of guide-pins extending out from the X-Y support platform, i.e., (RDPFH)≧Rp);
- i) firmly seating the DUT positioning frame located and precisely oriented macroscopically by shanks of the macroscopic array of extending guide-pins received through the corresponding array of guide-pin holes through the perimeter frame, with the bottom of face the perimeter frame resting on the planar presenting face of the test printed circuit board (PCB);
- j) temporarily fastening the shanks of the macroscopic array of guide-pins to the DUT positioning frame at the particular elevation parallel to the reference plane of the annular ‘V’-grooves proximate the extending distal tips of the guide-pins determined by the planar test printed circuit board (PCB) firmly sandwiched between the X-Y support platform and the DUT positioning frame;
- k) placing the transparent replica of the particular DUT into the open bottom well of the positioning cavity structure of the DUT positioning frame created for snugly receiving the particular DUT;
- l) adjusting and orienting the test printed circuit board (PCB) in and X-Y plane by moving it in the X-Y plane of the X-Y support platform into a position of optimal microscopic optical registry between a geometric pattern of the planar microscopic array of contactors traces on presenting face the test printed circuit board the geometric pattern of images of the microarray of contactors presented in the transparent replica of the particular semiconductor/integrated circuit DUT;
- m) providing an adjustable clamping force FC via means mounted within the throat housing of the clamping frame structure for tightly holding the sandwiched test printed circuit board (PCB) against the DUT at the position and orientation of optimal microscopic optical registry with the respective geometric patterns of the planar microscopic array of contactors traces on a presenting face a test printed circuit board (PCB) and the images of the microarray of the contactors in transparent replica of the particular DUT
- n) temporarily fastening the test printed circuit board (PCB) to the DUT positioning frame held together at the position and orientation of optimal microscopic optical registry;
- o) releasing the locking means securing the clamping frame structure onto the tips of each guide-pin penetrating into its macroscopic array of guide-pin holes;
- p) detaching the test printed circuit board (PCB) temporarily fastened to the DUT positioning frame and guide pins temporarily fastened to the DUT positioning frame from the inverted clamping frame structure providing the stationary planar X-Y support platform;
- q) permanently anchoring the test printed circuit board (PCB) temporarily fastened to the DUT positioning frame to the respective shanks of the guide pins temporarily fastened to the DUT positioning frame extending out the guide-pin anchor-holes of the test printed circuit board (PCB).
Dependencies are inferred from the claim text.