Backup power system

A power backup processor unit comprising:

• a first AC input line comprising a first inductance and
• provided to be connected to an AC power supply with a cyclical voltage VL,in;
• b) a first AC output line comprising a second inductance and provided to be connected to a critical load;
• c) a second AC output line provided to be connected to the critical load;
• d) a neutral line provided to be connected to a neutral port;
• e) first and second DC voltage busses provided to be connected to a DC power supply;
• f) a capacitor interposed between the first and second DC voltage busses;
• g) a first half-bridge circuit comprising a first switch and a second switch, wherein the first switch is connected between the first AC input line and the first DC voltage bus and the second switch is connected between the first AC input line and the second DC voltage bus;
• h) a second half-bridge circuit comprising a third switch and a fourth switch, wherein the third switch is connected between the first AC output line and the first DC voltage bus and the fourth switch is connected between the first AC output line and the second DC voltage bus;
• i) a third half-bridge circuit comprising a fifth switch and a sixth switch, wherein the fifth switch is connected between the neutral line and the first DC voltage bus and the sixth switch is connected between the neutral line and the second DC voltage bus;
• j) a series of controllers provided to command the switches, wherein said series of controllers is provided to command at least the first to fourth switches using pulse width modulation to convert VL,in into two different, substantially continuous voltages +Vb,−Vb at the first and the second DC voltage busses and said two different, substantially continuous voltages +Vb,−Vb into a cyclical voltage VL,out at the first AC output line;
• and characterised in that it also comprises
• k) a third inductance connected between said neutral line and said fifth and sixth switches;
• in that said second AC output line is directly connected to said neutral line;
• in that said series of controllers are provided to synchronize said first and second half-bridge circuits so that VL,in and VL,out have substantially the same phase and frequency, and
• in that said series of controllers is also provided to open the fifth switch and close the sixth switch for a period t1 of at least 50%, and preferably at least 95%, of a first half of a cycle of VL,in and close the fifth switch and open the sixth switch for a period t2 of at least 50%, and preferably at least 95%, of a second half of the cycle of VL,in.

A method of controlling a power backup processor unit, said power backup processor unit comprising:

• a) a first AC input line comprising a first inductance and provided to be connected to an AC power supply with a cyclical voltage VL,in;
• b) a first AC output line comprising a second inductance and provided to be connected to a critical load;
• c) a second AC output line provided to be connected to the critical load;
• d) a neutral line provided to be connected to a neutral port
• e) first and second DC voltage busses provided to be connected to a DC power supply;
• f) a capacitor interposed between the first and second DC voltage busses;
• g) a first half-bridge circuit comprising a first switch and a second switch, wherein the first switch is connected between the first AC input line and the first DC voltage bus and the second switch is connected between the first AC input line and the second DC voltage bus;
• h) a second half-bridge circuit comprising a third switch and a fourth switch, wherein the third switch is connected between the first AC output line and the first DC voltage bus and the fourth switch is connected between the first AC output line and the second DC voltage bus;
• i) a third half-bridge circuit comprising a fifth switch and a sixth switch, wherein the fifth switch is connected between the neutral line and the first DC voltage bus and the sixth switch is connected between the neutral line and the second DC voltage bus;
• and
• wherein said method comprises the steps of:
• j) pulse width modulating said first half-bridge circuit to convert VL,in into two different, substantially continuous voltages +Vb,−Vb at the first and the second DC voltage busses and said second half-bridge circuit to convert said two different, substantially continuous voltages +Vb,−Vb into a cyclical voltage VL,out at the first AC output line;
• and is characterised in that it also comprises the steps of
• k) opening the fifth switch and closing the sixth switch for a period t1 of at least 50%, and preferably at least 95%, of a first half of a cycle of VL,in;
• and
• l) closing the fifth switch and opening the sixth switch for a period t2 of at least 50%, and preferably at least 95%, of a second half of the cycle of VL,in.