Integrated circuit assemblies with alignment features and devices and methods related thereto
AssigneeAtmel Corporation
InventorKen M. Lam
Life of this patent
Estimating the term…
Abstract
A method of packaging an integrated circuit die including forming a mask window having a first aperture with a first set of alignment edges and forming an alignment feature on an uppermost surface of the integrated circuit die where the alignment feature has a second set of alignment edges. The alignment feature is inserted into the first aperture. The integrated circuit die is mechanically biased until the first and second set of alignment edges are in physical contact with one another and the alignment feature is secured into the mask window, thus forming an integrated circuit die assembly.
Claims18
An integrated circuit assembly comprising:
- at least one integrated circuit die;
- a windowed alignment mask located on a first surface of the at least one integrated circuit die and having at least one alignment mask window with a first set of alignment edges;
- an alignment feature located on an opposing second surface of the at least one integrated circuit die and having a second set of alignment edges, wherein the alignment feature is contained within the at least one alignment mask window and the first and second set of alignment edges are in physical contact with one another;
- and
- at least one spacing gap between the alignment feature and the alignment mask window, wherein the spacing gap is along an edge of either the alignment feature or the alignment mask window, and wherein the edge is opposite one of the edges of the first and second sets of alignment edges, and wherein the spacing gap is substantially filled with an adhesive.
An electronic device comprising:
- at least one integrated circuit die;
- a windowed alignment mask located on a first surface of the at least one integrated circuit die and having at least one alignment mask window with a first set of alignment edges;
- an alignment feature located on an opposing second surface of the at least one integrated circuit die and having a second set of alignment edges, wherein the alignment feature is contained within the at least one alignment mask window and the first and second set of alignment edges are in physical contact with one another;
- and
- at least one spacing gap between the alignment feature and the alignment mask window, wherein the spacing gap is along an edge of either the alignment feature or the alignment mask window, and wherein the edge is opposite one of the edges of the first and second sets of alignment edges, and wherein the spacing gap is substantially filled with an adhesive.
A method of forming an integrated circuit assembly comprising:
- forming a windowed alignment mask on a first surface of at least one integrated circuit die, wherein the window alignment mask has at least one alignment mask window with a first set of alignment edges;
- forming an alignment feature having a second set of alignment edges, the alignment feature located on an opposing second surface of the at least one integrated circuit die;
- containing the alignment feature within the at least one alignment mask window to form the integrated circuit die assembly, wherein the first and second set of alignment edges are in physical contact with one another;
- and
- substantially filling at least one spacing gap with an adhesive, wherein the spacing gap is between the alignment feature and the alignment mask window, and wherein the spacing gap is along an edge of either the alignment feature or the alignment mask window, and wherein the edge is opposite one of the edges of the first and second sets of alignment edges.
Dependencies are inferred from the claim text.