Process for manufacturing a power device on a semiconductor substrate and corresponding device

An electronic device comprising:

• a semiconductor substrate of a first conductivity type;
• and
• a drain layer adjacent the semiconductor substrate and having a plurality of drains, the drain layer comprising
• a first semiconductor layer of the first conductivity type adjacent the semiconductor substrate,
• at least one second semiconductor layer of a second conductivity type adjacent the first semiconductor layer,
• a plurality of first column regions of the first conductivity type extending through the at least one second semiconductor layer to contact the first semiconductor layer,
• a plurality of second column regions of the second conductivity type delimited by the plurality of first column regions,
• a plurality of body regions of the second conductivity type adjacent respective ones of the plurality of second column regions, and
• at least one third semiconductor layer of the second conductivity type positioned between the first semiconductor layer and the at least one second semiconductor layer and having a plurality of regions of the first conductivity type therein.

An electronic device comprising:

• a semiconductor substrate of a first conductivity type;
• and
• an edge structure adjacent the semiconductor substrate, the edge structure comprising
• a first semiconductor layer of the first conductivity type adjacent the semiconductor substrate,
• at least one second semiconductor layer of a second conductivity type adjacent the first semiconductor layer,
• a pair of regions of the first conductivity type extending through the at least one second semiconductor layer to contact the first semiconductor layer and delimit the edge structure, and
• at least one multi-drain electronic device between the pair of regions.