Semiconductor device with a non-volatile memory and resistor

A semiconductor device comprising:

• a non-volatile semiconductor storage element formed in a first semiconductor area of a semiconductor substrate;
• and
• a resistance element formed in a second semiconductor area of the semiconductor substrate,
• the non-volatile semiconductor storage element comprising:
• a first isolation formed in a first trench provided in the semiconductor substrate to isolate a surface of the first semiconductor area;
• a first insulator formed on the semiconductor substrate in the first semiconductor area;
• a first electrode formed on the first insulator including a lower first electrode and an upper first electrode, and a width of the upper first electrode being wider than a width of the lower first electrode, wherein side surfaces of the lower first electrode are in contact with the first isolation;
• a second insulator formed on at least an upper surface of the first electrode;
• and
• a second electrode formed on the second insulator,
• the resistance element comprising:
• a second isolation formed in a second trench provided in the semiconductor substrate to isolate a surface of the second semiconductor area;
• a third insulator formed on the semiconductor substrate in the second semiconductor area, and having a thickness thicker than that of the first insulator;
• a conductor layer which is formed on the third insulator, includes a lower conductor layer and an upper conductor layer and includes the same material as the first electrode therein, and a width of the upper conductor layer being wider than a width of the lower conductor layer, wherein the conductor layer is formed with the same layer as the first electrode, and all side surfaces parallel to a longitudinal direction of the upper conductor layer are in contact with the second isolation;
• a fourth insulator formed on an upper surface of the conductor layer;
• and
• third and fourth electrodes formed on the fourth insulator at each end of the conductor layer, respectively, including the same material as at least a part of the second electrode therein, and connected with the conductor layer;
• wherein a top surface of the second isolation is higher than a top surface of the semiconductor substrate, a bottom of the second isolation is lower than a bottom of the third insulator, and the top surface of the second isolation is higher than a top surface of the first isolation.