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US 8,044,395 B2Granted
Semiconductor memory apparatus for controlling pads and multi-chip package having the same
AssigneeHynix Semiconductor Inc.
InventorTae-Yong Lee
Life of this patent
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Abstract
A semiconductor memory apparatus includes a first pad group located along a first edge of a plurality of banks, a second pad group located along a second edge of the plurality of banks opposite the first pad group, and a pad control section configured to provide first and second bonding signals and to implement control operation in response to a test mode signal and a bonding option signal to selectively employ signals from the first and second pad groups.
Claims9
A semiconductor memory apparatus, comprising:
- a first pad group located along a first edge of a plurality of banks;
- a second pad group located along a second edge of the plurality of banks opposite the first pad group, wherein the second pad group is configured to be employed in case of failure of the first pad group and performs substantially the same functions as the first pad group;
- and
- a pad control section configured to communicate with one of the first and second pad groups in response to a test mode signal and a bonding option signal to employ signals from one of the first and second pad groups.
1 more element
Dependencies are inferred from the claim text.