Methods of forming semiconductor constructions

A method of forming a semiconductor construction, comprising:

• forming a gate oxide layer across a semiconductor substrate;
• forming a silicon-containing layer over the gate oxide layer;
• the silicon-containing layer having a thickness;
• the silicon-containing layer being n-type doped across a first region of the semiconductor substrate, and being p-type doped across a second region of the semiconductor substrate;
• forming multiple materials over the silicon-containing layer and across the first and second regions of the semiconductor substrate;
• forming a patterned mask over the multiple materials to define a first transistor gate location over the first region of the semiconductor substrate, and to define a second transistor gate location over the second region of the semiconductor substrate;
• transferring a pattern from the patterned mask through the multiple materials, and only partially into the silicon-containing layer;
• the partially-etched silicon-containing layer having an etched portion of its thickness and a remaining portion of its thickness;
• the transferring of the pattern forming a first partial gate structure over the first region and a second partial gate structure over the second region;
• the first and second partial gate structures having sidewalls comprising the multiple materials and the etched portion of the silicon-containing layer thickness;
• the etching partially into the silicon-containing layer utilizing Cl2 and CH2F2;
• forming spacers along the sidewalls of the first and second partial gate structures;
• after forming the spacers, etching through the remaining portion of the silicon-containing layer thickness to form first and second transistor gates from the first and second partial gate structures;
• the first and second transistor gates having exposed surfaces of the silicon-containing layer;
• the etching through the remaining portion of the silicon-containing layer utilizing an etch selective for n-type doped silicon and p-type doped silicon relative to the gate oxide;
• oxidizing the exposed surfaces of the silicon-containing layer of the first and second transistor gates;
• and
• forming source/drain regions within the substrate proximate the first and second transistor gates.

A method of forming a semiconductor construction, comprising:

• forming a gate oxide layer across first and second regions of a monocrystalline silicon-containing semiconductor substrate;
• forming a silicon-containing layer over the gate oxide layer and across the first and second regions of the substrate;
• the silicon-containing layer having a thickness;
• the silicon-containing layer being n-type doped across the first region, and being p-type doped across the second region;
• forming a titanium-containing layer over the silicon-containing layer and across the first and second regions of the substrate;
• forming a metal nitride over the titanium-containing layer and across the first and second regions of the substrate;
• forming an electrically insulative layer over the metal nitride and across the first and second regions of the substrate;
• providing a patterned mask over the electrically insulative layer to define a first transistor gate location over the first region of the substrate, and to define a second transistor gate location over the second region of the substrate;
• transferring a pattern from the patterned mask through the electrically insulative layer, the metal nitride and the titanium-containing layer, and only partially into the silicon-containing layer;
• the transferring of the pattern including a single etch which etches through the titanium-containing layer and into the silicon-containing layer;
• the partially-etched silicon-containing layer having an etched portion of its thickness and a remaining portion of its thickness;
• the transferring of the pattern forming a first partial gate structure over the first region and a second partial gate structure over the second region;
• the first and second partial gate structures having sidewalls comprising the titanium-containing layer, metal nitride, and etched portion of the silicon-containing layer thickness;
• forming spacers along the sidewalls of the first and second partial gate structures;
• after forming the spacers, etching through the remaining portion of the silicon-containing layer thickness to form first and second transistor gates from the first and second partial gate structures;
• the first and second transistor gates having exposed surfaces of the silicon-containing layer;
• oxidizing the exposed surfaces of the silicon-containing layer of the first and second transistor gates;
• and
• forming source/drain regions within the substrate proximate the first and second transistor gates.

A method of forming a semiconductor construction, comprising:

• forming a silicon-containing layer over an oxide;
• the silicon-containing layer being n-type doped across a first region of the oxide, and being p-type doped across a second region of the oxide;
• etching only partially into the silicon-containing layer to form a first partial structure over the first region and to form a second partial structure over the second region;
• the first and second partial structures having sidewalls comprising an etched portion of the silicon-containing layer;
• the etch partially into the silicon-containing layer being conducted with first etching conditions that are relatively non-selective between n-type doped silicon and p-type doped silicon;
• forming spacers along the sidewalls of the first and second partial structures;
• and
• after forming the spacers, etching through a remaining portion of the silicon-containing layer to the oxide;
• the etching through the remaining portion of the silicon-containing layer being conducted with second etching conditions that have higher selectivity than the first etching conditions between n-type doped silicon and p-type doped silicon.

A method of forming a semiconductor construction, comprising:

• forming an oxide across a semiconductor substrate;
• forming a silicon-containing layer over the oxide;
• the silicon-containing layer having a thickness;
• the silicon-containing layer having an n-type doped segment across a first region of the semiconductor substrate, and having a p-type doped segment across a second region of the semiconductor substrate;
• forming a patterned mask over the silicon-containing layer;
• partially etching through the silicon-containing layer to transfer a pattern from the patterned mask only partially through the n-type doped and p-type doped segments of the silicon-containing layer;
• the partially-etched silicon-containing layer having an etched portion of its thickness and a remaining portion of its thickness;
• the transferring of the pattern forming a first partial structure within the n-type doped segment over the first region and forming a second partial structure within the p-type doped segment over the second region;
• the first and second partial structures having sidewalls comprising the etched portion of the silicon-containing layer thickness;
• the etching partially through the silicon-containing layer utilizing Cl2 and CH2F2;
• forming spacers along the sidewalls of the first and second partial structures;
• and
• after forming the spacers, etching through the remaining portion of the silicon-containing layer thickness to the oxide to form first and second structures from the first and second partial structures;
• the etching through the remaining portion of the silicon-containing layer utilizing an etch selective for n-type doped silicon and p-type doped silicon relative to the gate oxide.