Method of fabricating memory
AssigneeMacronix International Co., Ltd.
InventorCheng-Ming Yih
Life of this patent
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Abstract
A method of fabricating a semiconductor device is provided. First, a stacked structure is formed on a substrate. The stacked structure includes, from the substrate, a dielectric layer and a conductive gate in order. An ion implant process is performed to form doped regions in the substrate on the opposite sides of the stacked structure. Thereafter, source-side spacer is formed on a sidewall of the stacked structure. A thermal process is performed to activate the doped regions, thereby forming a source in the substrate under the sidewall of the stacked structure having the source-side spacer and a drain in the substrate on another side of the stacked structure.
Claims20
A method of fabricating a memory, comprising:
- forming a stacked structure on a substrate, wherein the stacked structure comprises, from the substrate, a tunneling layer, a dielectric layer and a control gate in order;
- performing an ion implant process to form a doped region in the substrate on the opposite sides of the stacked gate;
- forming a source-side spacer on a sidewall of the stacked structure;
- and
- performing a thermal process to activate the doped regions and to oxidize the substrate and the stacked structure, thereby forming a source in the substrate under the sidewall of the stacked structure having the source-side spacer and a drain in the substrate on another side of the stacked structure and forming an asymmetry tunnel layer.
A method of fabricating a semiconductor device, comprising:
- forming a stacked structure on a substrate, wherein the stacked structure comprises, from the substrate, a dielectric layer and a conductive gate in order;
- performing an ion implant process to form a doped region in the substrate on the opposite sides of the stacked structure;
- forming a source-side spacer on a sidewall of the stacked structure;
- and
- performing a thermal process to activate the doped regions and to oxidize the substrate and the stacked structure, thereby forming a source in the substrate under the sidewall of the stacked structure having the source-side spacer and a drain in the substrate on another side of the stacked structure and forming an asymmetry dielectric layer.
A method of fabricating a semiconductor device, comprising:
- forming a stacked structure on a substrate, wherein the stacked structure comprises a dielectric layer and a conductive gate;
- forming a doped region in the substrate on the opposite sides of the stacked structure;
- forming a spacer on a sidewall of the stacked structure and exposing another sidewall of the stacked structure;
- and
- performing a thermal process to form an uneven surface of the substrate.
Dependencies are inferred from the claim text.