Algorithm and architecture for multi-argument associative operations that minimizes the number of components using a latency of the components

A non-transitory computer-readable medium storing instructions for generating components for calculating an output of an associative operation, the instructions when executed causing a computer to:

• decomposing a number of inputs to the associative operation into a vector V, a number of elements in the vector representing a number of components used to calculate the output of the associative operation, values of the elements in the vector corresponding to a number of inputs for a corresponding component;
• processing the vector V to reduce a number of inputs to one or more of the components represented in the vector, the vector V satisfying the following conditions:
• the sum of the elements in the vector minus the length of the vector plus one equals the number of inputs to the associative operation, and
• the value of each element Ak in the vector is greater than the value of the previous element Ak-1;
• generate a first component representative of an element in the vector V as part of a graphical model in a graphical modeling environment, the first component comprising at least two inputs, the first component being operable to produce a first output;
• generate a second component representative of an element in the vector V as part of the graphical model in the graphical modeling environment, the second component comprising at least three inputs, at least one of the at least three inputs being the first output of the first component, the second component:
• processing two of the at least three inputs to produce a second output prior to receiving the first output from the first component, and the second component;
• processing the first output and the second output to produce a third output after first and second outputs are produced;
• and
• generating a hardware description language representation of the first component and the second component.

A computer system for determining an architecture for calculating an output for one or more operations, the system comprising:

• a processor for executing;
• a modeling environment;
• an architecture generator used by the modeling environment to generate a first component and a second component, the architecture generator:
• decomposing a number of inputs to the associative operation into a vector V, a number of elements in the vector representing a number of components used to calculate the output of the associative operation, values of the elements in the vector corresponding to a number of inputs for a corresponding component and
• processing the vector V to reduce a number of inputs to one or more of the components represented in the vector, the vector V satisfying the following conditions:
• the sum of the elements in the vector minus the length of the vector plus one equals the number of inputs to the associative operation, and
• the value of each element Ak in the vector is greater than the value of the previous element Ak-1;
• the first component representative of an element in the vector V and comprising at least two inputs, the first component being operable to produce a first output;
• and
• the second component representative of an element in the vector V and comprising at least three inputs, at least one of the at least three inputs being the first output of the first component, the second component being operable to process two of the at least three inputs to produce a second output prior to receiving the first output from the first component, and the second component being operable to process the first output and the second output to produce a third output after first and second outputs are produced.