Supplementary timing recovery
AssigneeMarvell International Ltd.
InventorsJin Xie, Mats Oberg
Life of this patent
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AssigneeMarvell International Ltd.
InventorsJin Xie, Mats Oberg
Estimating the term…
Aspects of the disclosure provide a signal processing circuit to reconstruct data from an analog signal. The signal processing circuit includes an analog to digital converter (ADC), an equalizer, a first timing compensation module, a phase-shift module and a second timing compensation module. The ADC receives an analog input signal, samples the analog input signal based on a sampling clock signal, and converts the sampled analog input signal into a digital output signal. The equalizer equalizes the digital output signal. The first timing compensation module detects a first timing error based on the digital output signal, and adjusts the sampling clock signal based on the first timing error. The phase-shift module phase-shifts the equalized digital output signal based on a phase-shift signal. The second timing compensation module detects a second timing error based on the equalized digital output signal, and adjusts the phase-shift signal based on the second timing error.
A signal processing circuit, comprising:
A method for signal processing, comprising:
An apparatus for reading a non-transitory optical medium, comprising:
Dependencies are inferred from the claim text.