Multiple-core processor supporting multiple instruction set architectures

A method of managing operation of a processing system supporting multiple incompatible instruction sets, wherein said processing system supports execution of multiple operating system images within multiple virtual machines, said method comprising:

• receiving a request to execute a particular application program;
• generating a request to instantiate a virtual machine having a specified instruction set from among the multiple instruction sets supported by the processing system and a specified operating system program in response to receiving the request to execute the particular application program, wherein the specified operating system program is an operating system program required for execution of the particular application program and the specified instruction set is an instruction set required for execution of the specified operating system program;
• determining an availability status of a given core that supports the specified instruction set within a processor having multiple cores, at least one core supporting said specified instruction set and at least one other core not supporting said specified instruction set and supporting another instruction set incompatible with the specified instruction set, and wherein only one of the multiple cores is selectable for operation at any given time, and wherein power is supplied to only a selected one of the multiple cores that is selected for operation;
• in response to determining that said given core is available, selecting the given core for execution of the virtual machine from among the multiple cores by applying a power supply voltage to the given core and instantiating said virtual machine on said core and executing the particular operating system;
• in response to determining that said given core is not available, failing instantiation of said virtual machine;
• and
• executing the application program within the virtual machine.

A processing system comprising:

• a memory for storing program instructions and data;
• and
• a processor for executing said program instructions, said program instructions including multiple operating systems executing within multiple virtual machines, wherein said program instructions further comprise hypervisor program instructions for managing said virtual machines, and wherein said hypervisor program instructions comprise program instructions for
• receiving a request to instantiate a virtual machine having a specified instruction set, wherein the instruction set is an instruction set required for execution of the virtual machine and is specified in conjunction with the request from among the multiple instruction sets supported by the processing system;
• determining an availability status of a given core that supports the specified instruction set within a processor having multiple cores, at least one core supporting said specified instruction set and at least one other core not supporting said specified instruction set and supporting another instruction set that is incompatible with the specified instruction set, wherein only one of the multiple cores is selectable for operation at any given time, and wherein power is supplied to only a selected one of the multiple cores that is selected for operation;
• selecting the given core for execution of the virtual machine from among the multiple cores by applying a power supply voltage to the given core and instantiating said virtual machine on said core in response to determining that said given core is available;
• and
• failing instantiation of said virtual machine in response to determining that said given core is not available.