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US 8,028,216 B1Granted
Embedded parity coding for data storage
AssigneeMarvell International Ltd.
InventorsEngling Yeo, Eugene Pan, Henri Sutioso, Jun Xu, Shaohua Yang, Panu Chaichanavong, Gregory Burd, Zining Wu
Life of this patent
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Abstract
An encoder system includes a receive module that receives a data stream. A parity generation module generates parity bits based on the data stream and a tensor-product code. A parity insertion module combines the parity bits and the data stream to generate encoded bits.
Claims54
An encoder system comprising:
- a receive module configured to receive a data stream, wherein the data stream comprises a first user data series and a second user data series;
- an insertion module configured to insert place holder bits in the first user data series for low-density parity check bits;
- a parity generation module configured to generate error correction bits based on (i) the data stream and (ii) a tensor-product code;
- an interleave module configured to interleave the error correction bits with at least one of the first user data series or the second user data series to generate an input signal;
- and
- an encoder configured to (i) receive the input signal and (ii) replace the place holder bits with the low-density parity check bits to generate an encoded signal.
3 more elements
A method of operating an encoder system, the method comprising:
- receiving a data stream comprising a first user data series and a second user data series;
- inserting place holder bits in the first user data series for low-density parity check bits;
- generating error correction bits based on (i) the data stream and (ii) a tensor-product code;
- interleaving the error correction parity bits with at least one of the first user data series or the second user data series to generate an input signal;
- and
- based on the input signal, replacing the place holder bits with low-density parity check bits to generate an encoded signal.
3 more elements
Dependencies are inferred from the claim text.