Computer system and bus control device
AssigneeNEC Corporation
InventorHiroaki Oshida
Life of this patent
Estimating the term…
Abstract
The bus control device includes a reset control unit which resets the input and output bus in response to receipt of reset instruction; a reset inhibition unit which inhibits a reset of the input and output bus triggered by a fault occurrence in the input and output bus; a log collection unit which collects log information of an input and output device connected to a fault occurrence section in the input and output bus triggered by the fault occurrence in the input and output bus; and an input and output interface which transfers the log information collected by the log collection unit to the processor. The reset inhibition unit cancels inhibition of the reset after the collection of the log information by the log collection unit has been completed.
Claims18
A computer system comprising:
- a processor which performs data processing;
- an input and output bus to which at least one input and output device is connected;
- and
- a bus control device which is intervened between said processor and said input and output bus, and performs control of the operation of said input and output bus;
- wherein said bus control device includes:
- a reset control unit which resets said input and output bus in response to receipt of reset instruction;
- a reset inhibition unit which inhibits a reset of said input and output bus triggered by a fault occurrence in said input and output bus;
- a log collection unit which collects log information of an input and output device connected to a fault occurrence section in said input and output bus triggered by the fault occurrence in said input and output bus, the log information including internal register information of said bus control device and a hold value of the input and output device;
- and
- an input and output interface which transfers the log information collected by said log collection unit to said processor;
- wherein said reset inhibition unit cancels inhibition of the reset after the collection of the log information by said log collection unit has been completed.
A bus control device which intervenes between a processor which performs data processing and an input and output bus to which at least one input and output device is connected, and performs control of the operation of said input and output bus, said bus control device comprising:
- a reset control unit which resets said input and output bus in response to receipt of reset instruction;
- a reset inhibition unit which inhibits a reset of said input and output bus triggered by a fault occurrence in said input and output bus;
- a log collection unit which collects log information of an input and output device connected to a fault occurrence section in said input and output bus triggered by the fault occurrence in said input and output bus, the log information including internal register information of said bus control device and a hold value of the input and output device;
- and
- an input and output interface which transfers the log information collected by said log collection unit to said processor;
- wherein said reset inhibition unit cancels inhibition of the reset after the collection of the log information by said log collection unit has been completed.
A computer system comprising:
- a processor which performs data processing;
- an input and output bus to which at least one input and output device is connected;
- and
- a bus control device which is intervened between said processor and said input and output bus, and performs control of the operation of said input and output bus;
- wherein said bus control device includes:
- a reset control means for resetting said input and output bus in response to receipt of reset instruction;
- a reset inhibition means for inhibiting a reset of said input and output bus triggered by a fault occurrence in said input and output bus;
- a log collection means for collecting log information of an input and output device connected to a fault occurrence section in said input and output bus triggered by the fault occurrence in said input and output bus, the log information including internal register information of said bus control device and a hold value of the input and output device;
- and
- an input and output interface which transfers the log information collected by said log collection means to said processor;
- wherein said reset inhibition means cancel inhibition of the reset after the collection of the log information by said log collection means has been completed.
A bus control device which intervenes between a processor which performs data processing and an input and output bus to which at least one input and output device is connected, and performs control of the operation of said input and output bus, said bus control device comprising:
- a reset control means for resetting said input and output bus in response to receipt of reset instruction;
- a reset inhibition means for inhibiting a reset of said input and output bus triggered by a fault occurrence in said input and output bus;
- a log collection means for collecting log information of an input and output device connected to a fault occurrence section in said input and output bus triggered by the fault occurrence in said input and output bus, the log information including internal register information of said bus control device and a hold value of the input and output device;
- and
- an input and output interface which transfers the log information collected by said log collection means to said processor;
- wherein said reset inhibition means cancel inhibition of the reset after the collection of the log information by said log collection means has been completed.
A bus control method of controlling of the operation of an input and output bus to which at least one input and output device is connected, said bus control method comprising:
- resetting said input and output bus in response to receipt of reset instruction;
- inhibiting a reset of said input and output bus triggered by a fault occurrence in said input and output bus;
- collecting log information of an input and output device connected to a fault occurrence section in said input and output bus triggered by the fault occurrence in said input and output bus, the log information including internal register information of said bus control device and a hold value of the input and output device;
- transferring the log information collected to a processor which performs data processing;
- and
- canceling the inhibition of the reset after the collection of the log information has been completed.
Dependencies are inferred from the claim text.