Dynamic CPU voltage regulator phase shedding
AssigneeDell Products L.P.
InventorJohn E. Jenne
Life of this patent
Estimating the term…
Abstract
A voltage regulator phase shedding system includes one or more subsystems to receive a system management interrupt (SMI), gather processor utilization information, determine whether to adjust a performance state, lookup voltage regulator information for new performance state, adjust active voltage regulator phase, and adjust performance state. The voltage regulator phase shedding system can also include one or more subsystems to read a power measurement, calculate throttling requirements, determine whether to adjust a throttling, lookup voltage regulator information for new performance state capacity, adjust active voltage regulator phase, and adjust throttling.
Claims20
A voltage regulator phase adjustment system comprising one or more subsystems to:
- determine a first performance state (P-state) of a processor;
- use the first P-state to determine that a load of the processor is located at a first efficiency point on a voltage regulator efficiency curve;
- and
- shed at least one active processor voltage regulator phase, wherein, in response to the shedding, the load of the processor shifts to a second efficiency point on the voltage regulator efficiency curve that includes a higher efficiency relative to the first efficiency point.
An information handling system (IHS) comprising:
- a processor;
- memory coupled to the processor;
- and
- a voltage regulator coupled to the processor, wherein the voltage regulator includes a voltage regulator phase adjustment system further comprising one or more subsystems to:
- receive an indication that the processor is switching from a first performance state (P-state) to a second P-state;
- determine, using a load increase of the processor that is associated with the switch from the first P-state to the second P-state, that the voltage regulator will operate more efficiently at the second P-state relative to the first P-state if at least one additional active processor voltage regulator phase is enabled and,
- in response, enable the at least one active processor voltage regulator phase of the voltage regulator;
- and
- switch the processor from the first P-state to the second P-state subsequent to enabling the at least one active processor voltage regulator phase.
A method to adjust voltage regulator phases, the method comprising:
- determining a first performance state (P-state) of a processor;
- using the first P-state to determine that a load of the processor is located at a first efficiency point on a voltage regulator efficiency curve;
- and
- shedding at least one active processor voltage regulator phase, wherein, in response to the shedding, the load of the processor shifts to a second efficiency point on the voltage regulator efficiency curve that includes a higher efficiency relative to the first efficiency point.
A voltage regulator phase adjustment system comprising one or more subsystems to:
- read a power measurement;
- calculate throttling requirements using the power measurement;
- determine voltage regulator phase efficiency information based on the throttling requirements;
- adjust at least one active voltage regulator phase using the voltage regulator phase efficiency information that is based on the throttling requirements;
- and
- perform a throttling operation according to the throttling requirements subsequent to adjusting the at least one active voltage regulator phase.
Dependencies are inferred from the claim text.