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US 8,028,143 B2Granted
Method and apparatus for transmitting memory pre-fetch commands on a bus
AssigneeQUALCOMM Incorporated
InventorsRichard Gerard Hofmann, Mark Michael Schaffer
Life of this patent
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Abstract
A processing system and method is disclosed wherein a processor may be configured to predict an address of memory from which data will be needed, transmit to a memory controller a pre-fetch command for the data at the predicted address of the memory, and transmit to the memory controller a read request for the data at the predicted address of the memory if the data is needed.
Claims13
A method comprising:
- transmitting a first instruction to a memory controller via a bus, the first instruction transmitted by a processor and including a memory address of data and a first type code, wherein the data is not received by the processor in response to the first instruction;
- transmitting a second instruction to the memory controller via the bus, the second instruction including the memory address and a second type code;
- wherein the first type code identifies the first instruction as a pre-fetch request and the second type code identifies the second instruction as a read request;
- and
- receiving the data at the processor in response to the read request;
- wherein the memory controller is configured to open a page of memory containing the data in response to receiving the prefetch request and to read the data from the opened page of memory in response to receiving the read request;
- wherein the memory controller is configured to wait to read the data from the opened page until the read request is received.
4 more elements
A system comprising:
- a processor;
- means for storing data that is retrieved from a memory in response to a pre-fetch command received, at the means for storing data, from the processor;
- wherein the means for storing data is accessible to the processor via a system bus;
- and
- wherein the means for storing data is configured to discard the data in response to the means for storing data receiving a subsequent pre-fetch command before the means for storing data receives a read command for the data, wherein the means for storing data is further configured to retain the data independently of incoming read requests received at the means for storing data to access memory pages that do not correspond to the data.
2 more elements
A system comprising:
- a processor;
- means for storing data that is retrieved from a memory in response to a pre-fetch command received, at the means for storing data, from the processor;
- wherein the means for storing data is accessible to the processor via a system bus;
- and
- wherein the means for storing data is configured to discard the data in response to the means for storing data receiving a subsequent pre-fetch command before the means for storing data receives a read command for the data, wherein the means for storing data includes a buffer and a memory controller, and wherein the memory controller is configured to receive a sideband signal that includes a type code, and wherein the memory controller is configured to use the type code to distinguish the pre-fetch command from the read command.
2 more elements
A system comprising:
- a memory controller including a buffer, wherein the memory controller is configured to store data from a page of memory to the buffer in response to receiving a pre-fetch request for the data from a processor, wherein the memory controller is configured to send the data that is stored in the buffer to the processor in response to a read request for the data, and wherein the memory controller is further configured to discard the data that is stored in the buffer when in response to the memory controller receiving a subsequent pre-fetch request before the memory controller receives the read request for the data stored in the buffer, wherein the memory controller is further configured to discard the data that is stored in the buffer in response to receiving a predetermined number of read requests to a second data page without receiving the read request for the data stored in the buffer.
A method comprising:
- storing data at a memory controller, the data retrieved from a memory in response to a pre-fetch command;
- and
- discarding the data from the memory controller in response to receiving a subsequent prefetch command before receiving a read command for the data, further comprising receiving a sideband signal at the memory controller, the sideband signal including a type code, and using the type code to distinguish the pre-fetch command from the read command.
Dependencies are inferred from the claim text.