Fast processing memory array
AssigneeInternational Business Machines Corporation
InventorsOliver Keren Ban, Xiangang Cheng, Eric James St. Amand
Life of this patent
Estimating the term…
Abstract
The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for increasing efficiency associated with data access. In one illustrative embodiment a memory chip is presented comprising of a plurality of memory units for storing data; a plurality of processing units for processing the data; and a word line and a bit line external to the plurality of memory units, wherein the plurality of processing units directly access the word line and the bit line in accessing the data.
Claims11
A memory chip for increasing efficiency associated with data access, the memory chip comprises of:
- a plurality of memory units internal to the memory chip for storing data, wherein each memory unit has a set of memory cells arranged in a contiguous array of memory cells, and wherein each memory cell is configured to store a single bit of data;
- a word line configured to directly move a single word of data at a time to and from the contiguous array of memory cells of each memory unit of the plurality of memory units internal to the memory chip;
- a bit line configured to directly move only a single bit of data at a time to and from each memory cell of the contiguous array of memory cells of each memory unit of the plurality of memory units internal to the memory chip;
- a plurality of processing units internal to the memory chip for processing the data;
- the word line and the bit line configured for use by the processing units internal to the memory chip, wherein the plurality of processing units internal to the memory chip directly accesses the word line and the bit line in accessing the data;
- the word line and the bit line configured for use by a plurality of processing units external to the memory chip, wherein the plurality of processing units external to the memory chip directly accesses the word line and the bit line in accessing the data.
A computer implemented method for processing data, the computer implemented method comprising:
- accessing a word line and a bit line directly by an external memory component to access data within a memory unit, wherein the word line is configured to directly move a single word of data at a time to and from a contiguous array of memory cells of each memory unit of a plurality of memory units internal to a memory chip, and wherein the bit line is configured to directly move only a single bit of data at a time to and from each memory cell of the contiguous array of memory cells of each memory unit of the plurality of memory units internal to the memory chip;
- and
- associating the data with an identifier to form tagged data, wherein the identifier identifies the external memory component that accessed the data.
Dependencies are inferred from the claim text.