Shift register
AssigneeAu Optronics Corporation
InventorsYu-Chung Yang, Kuo-Chang Su, Yung-Chih Chen, Chun-Hsin Liu
Life of this patent
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Abstract
An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state.
Claims5
A shift register comprising:
- a plurality of transistors, subjected to the control of a start pulse signal, a first clock pulse signal and a second clock pulse signal to generate a gate driving signal, wherein the first clock pulse signal and the second clock pulse signal are phase-inverted with respect to each other, and a logic low level of the first clock pulse signal and another logic low level of the second clock pulse signal are different from each other;
- wherein the transistors are negative threshold voltage transistors, and a potential at the gate of each of the transistors is lower than another potential at the source/drain of the transistor in the situation of the transistor being switched off.
Dependencies are inferred from the claim text.