Burst mode control circuit
AssigneeHynix Semiconductor Inc.
InventorKyong Ha Lee
Life of this patent
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Abstract
A burst mode control unit includes a burst period signal generation unit for generating a burst period signal which is enabled during a burst mode operation period, a burst pulse generation unit for generating a burst pulse, which is generated at every predetermined number of cycles during the enabled period of the burst period signal, in response to a read command and a write command, and a column access signal generation unit for receiving the burst signal and a clock signal and generating a column access signal which controls input and output of data during the burst mode operation period.
Claims25
A burst mode control circuit, comprising:
- a burst period signal generation unit for generating a burst period signal which is enabled during a burst mode operation period;
- a burst pulse generation unit for generating a burst pulse, which is generated at each of predetermined cycles in the enabled period of the burst period signal, in response to a read command and a write command;
- and
- a column access signal generation unit configured to receive the burst pulse and a clock signal and generate a column access signal which controls input and output of data during the burst mode operation period.
A burst mode control circuit, comprising:
- a burst pulse generation unit for generating a burst pulse, which includes a pulse generated at every predetermined number of cycles during a burst mode operation period;
- and
- a column access signal generation unit for receiving the burst pulse and a clock signal and generating a column access signal which controls input and output of data during the burst mode operation period.
Dependencies are inferred from the claim text.