Data input apparatus with improved setup/hold window
AssigneeHynix Semiconductor Inc.
InventorsKie Bong Ku, Kwang Jun Cho
Life of this patent
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Abstract
In the data input apparatus, a data delay unit outputs data input from outside the data input apparatice. The data delay unit varies the degree of delay in response to a test mode signal. A data alignment signal generating unit receives a first signal synchronized with an external clock signal and a second signal synchronized with a data strobe signal, and the data alignment signal generating unit outputs one of the first signal and the second signal as a data alignment signal in response to the test mode signal. A data alignment unit is synchronized with the data alignment signal to align the data delayed in the data delay unit. The data input apparatus improves the setup/hold window when a semiconductor memory device is in the test mode.
Claims18
A data input apparatus comprising:
- a data delay unit delaying and outputting data inputted from outside the data input apparatus, wherein a degree of delay differs according to a test mode signal;
- a data alignment signal generating unit receiving a first signal synchronized with an external clock signal and receiving a second signal synchronized with a data strobe signal to output one of the first signal and the second signal as a data alignment signal in response to the test mode signal;
- and
- a data alignment unit synchronized with the data alignment signal to align the data delayed in the data delay unit.
A data input apparatus comprising:
- a data strobe buffer unit receiving and buffering a data strobe signal in response to a test mode signal to output a rising data strobe signal and a falling data strobe signal;
- a data delay unit delaying and outputting data inputted from outside the data input apparatus, wherein a degree of delay differs according to the test mode signal;
- a clock buffer unit buffering an external clock signal to output an internal clock signal;
- a signal selection unit selecting one of the rising data strobe signal and the internal clock signal in accordance with the test mode signal, and selecting one of the falling data strobe signal and an inverted internal clock signal in accordance with the test mode signal, and outputting selected signals as a data alignment signal;
- and
- a data alignment unit synchronized with the data alignment signal to align the data outputted from the data delay unit.
Dependencies are inferred from the claim text.