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US 8,027,208 B2Granted
Flash memory device and programming method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorMoo-Sung Kim
Life of this patent
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Abstract
The flash memory device includes a memory cell array having a plurality of memory cells, a high voltage generator configured to generate a plurality of pass voltages, with a first pass voltage of the plurality of pass voltages supplied to the memory cell array during a programming operation; and a main controller including a voltage controller configured to shift the first pass voltage at a plurality of time intervals during the programming operation.
Claims23
A flash memory device comprising:
- a memory cell array having a plurality of memory cells;
- a high voltage generator configured to generate a plurality of pass voltages;
- and
- a main controller including a selection identifier and a voltage controller, the selection identifier configured to determine a selected area and an unselected area of the memory cell array and to select a first pass voltage from the plurality of pass voltages to be applied to the selected area and a second pass voltage from the plurality of pass voltages to be applied to the unselected area, the voltage controller configured to shift the first pass voltage at a plurality of time intervals during a programming operation.
1 more element
A main controller, comprising:
- a selection identifier configured to determine,
- higher and lower word-line address bits based on an input word-line address and constants M and N, where the M and the N are natural numbers,
- a selected area of a memory array based on the higher and lower word-line address bits, and
- an unselected area of the memory array based on the selected area, where the selection identifier outputs a set of enabling signals based on the determined selected and unselected areas;
- a selective controller configured to receive a first plurality of pass voltages and selectively output one of the first plurality of pass voltages for the selected area in response to the set of enabling signals;
- a deselective controller configured to receive a second plurality of pass voltages and selectively output one of the second plurality of pass voltages for the unselected area in response to the set of enabling signals;
- a voltage controller configured to control the selective controller to shift at least one of the first plurality of pass voltages received by the selective controller during a plurality of time periods of a program interval;
- and
- a control driver configured to receive and selectively output one of the outputs of the selective and deselective controllers in response to the set of enabling signals.
6 more elements
A programming method of a flash memory, comprising:
- setting two constants M and N, where the M and the N are natural numbers;
- inputting word-line address information to be programmed;
- determining,
- the word-line address information to be programmed,
- higher and lower word-line address bits based on the word-line address information and the constants M and N,
- a selected area of the flash memory based on the higher and lower word-line addresses, and
- an unselected area of the flash memory based on the selected area;
- applying a first pass voltage to an address of the selected area;
- applying a second pass voltage to an address of the unselected area;
- and
- shifting the first pass voltage at a plurality of time intervals.
8 more elements
Dependencies are inferred from the claim text.