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US 8,027,204 B2Granted
Flag signal generation circuit and semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorKeun Kook Kim
Life of this patent
Estimating the term…
Abstract
There is provided a flag signal generation circuit. The flag signal generation circuit includes a status register read (SRR) signal generating unit receiving an idle signal and an SRR command to generate an SRR signal; a pulse signal generating unit receiving an SRR signal to generate a pulse signal; and a flag signal generating unit receiving the pulse signal and a read signal for SRR to generate a flag signal.
Claims19
A flag signal generation circuit comprising:
- a status register read (SRR) signal generating unit receiving an idle signal and an SRR command to generate an SRR signal;
- a pulse signal generating unit receiving an SRR signal to generate a pulse signal;
- and
- a flag signal generating unit receiving the pulse signal and a read signal for SRR to generate a flag signal.
1 more element
A semiconductor memory device comprising:
- a flag signal generation circuit generating a flag signal enabled until a read signal for SRR is inputted after SRR is started;
- and
- an active signal generating unit receiving the flag signal and an external active signal to generate an internal active signal.
Dependencies are inferred from the claim text.