Fault testing for interconnections

A method comprising:

• applying a first test pattern to a first wire of an interconnect, the interconnect including the first wire and a second wire;
• sending a first control signal to a first switch, the first switch to open or close a first connection for the first wire based on the first control signal;
• sending a second control signal to a second switch, the second switch to open or close a second connection for the second wire based on the second control signal, the first control signal and second control signal setting at least a portion of a test path for the test pattern;
• monitoring the interconnection for received signals;
• and
• determining whether a fault exists in the interconnection based on the monitoring of the interconnection;
• wherein the first control signal and the second control signal provide for independent control of the first switch and the second switch.

A fault analysis system comprising:

• a first set of switches to open and close connections for a first interconnection, the first interconnection including a first wire and a second wire, the first set of switches including two switches for a transmitter side of the first interconnection and two switches for a receiver side of the first interconnection;
• a second set of switches to open and close connections for a second interconnection, the first interconnection including a third wire and a fourth wire, the second set of switches including two switches for a transmitter side of the second interconnection and two switches for a receiver side of the second interconnection, the first set of switches and the second set of switches to operate to set at least a portion of a test path;
• one or more pattern sources to apply signals to one or more wires of the first interconnection and the second interconnection;
• and
• logic to identify one or more faults in the first interconnection and the second interconnection based on reception of the signals from the one or more pattern sources;
• wherein each of the switches of the first set of switches and the second set of switches is independently controllable.

A computer-readable medium having stored thereon data representing sequences of instructions that, when executed by a processor, cause the processor to perform operations comprising:

• applying a first test pattern to a first wire of an interconnect, the interconnect including the first wire and a second wire;
• sending a first control signal to a first switch, the first switch to open or close a first connection for the first wire based on the first control signal;
• sending a second control signal to a second switch, the second switch to open or close a second connection for the second wire based on the second control signal, the first switch and second switch setting a least a portion of a test path for the first test pattern;
• receiving one or more signals on the interconnection;
• and
• determining whether a fault exists in the interconnection based on the received signals;
• wherein the first control signal and the second control signal provide for independent control of the first switch and the second switch.