Voltage regulator and method having reduced wakeup-time and increased power efficiency
AssigneeCypress Semiconductor Corporation
InventorsNaga Radha Krishna Damaraju, Srikanth Reddy Tiyyagura
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AssigneeCypress Semiconductor Corporation
InventorsNaga Radha Krishna Damaraju, Srikanth Reddy Tiyyagura
Estimating the term…
A voltage regulator and method of using the same are provided that improve wakeup-time and reduce power wastage in switching a device from standby or sleep-mode to active mode. Generally, the voltage regulator includes: (i) a standby regulator having a high-impedance node (NGATE); (ii) an active regulator having a high-impedance node (dominant pole node); (iii) a compensation capacitor; and (iv) a switching circuit to couple the compensation capacitor to the high-impedance node (NGATE) of the standby regulator while the device is in sleep-mode to pre-charge the compensation capacitor, and to couple the compensation capacitor to the high-impedance node (dominant pole node) of the active regulator while the device is in active or non-sleep-mode. Other embodiments are also disclosed.
A voltage regulator comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.