IC package reducing wiring layers on substrate and its carrier
AssigneeChipMOS Technologies Inc.
InventorsHung Tsun Lin, Wu Chang Tu, Cheng Ting Wu
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AssigneeChipMOS Technologies Inc.
InventorsHung Tsun Lin, Wu Chang Tu, Cheng Ting Wu
Estimating the term…
An IC package primarily includes a chip, a plurality of electrical connecting components, and a chip carrier including a substrate, a die-attaching layer, and at least one bonding wire. The substrate has a top surface and a bottom surface wherein the top surface includes a die-attaching area for being disposed with the die-attaching layer. The chip is attached to the die-attaching area by the die-attaching layer and is electrically connected to the substrate by the electrical connecting components. Both ends of the bonding wire are bonded respectively to two interconnecting fingers on the top surface of the substrate, and at least a portion of the bonding wire is encapsulated in the die-attaching layer such that some wirings or vias formed on a conventional substrate are not needed. Therefore, the substrate can have a simpler structure and fewer numbers of wiring layers; consequently, the substrate cost can be reduced.
An IC package comprising:
A chip carrier of an IC package comprising:
Dependencies are inferred from the claim text.