Semiconductor package
AssigneeHynix Semiconductor Inc.
InventorJong Hoon Kim
Life of this patent
Estimating the term…
Abstract
A semiconductor package comprises a substrate having bond fingers on an upper surface thereof and ball lands on a lower surface thereof; at least two chip modules stacked on the upper surface of the substrate, each of the at least two chip modules including a plurality of semiconductor chips having first connection members and stacked in a manner such that the first connection members of the semiconductor chips are connected to one another, the chip modules being stacked in a zigzag pattern such that connection parts of the chip modules project sideward; and second connection members electrically connecting the connection parts of the respective chip modules to the bond fingers of the substrate.
Claims19
A semiconductor package comprising:
- a substrate having bond fingers on an upper surface thereof;
- at least two chip modules stacked on the upper surface of the substrate, each of the at least two chip modules including:
- a plurality of semiconductor chips having first connection members and stacked in a manner such that the first connection members of the semiconductor chips are electrically connected to one another, the first connection to members of the plurality of semiconductor chips being a connection part of the chip module,
- the chip modules being stacked in a zigzag pattern such that the connection parts of the respective chip modules project sideward;
- and
- second connection members electrically connecting the connection parts of the respective chip modules to the bond fingers of the substrate.
A semiconductor package comprising:
- a substrate having a window, a first bond finger disposed on a lower surface of the substrate, and a second bond finger disposed on an upper surface of the substrate;
- at least two chip modules stacked on the upper surface of the substrate, each of the at least two chip modules including:
- a plurality of semiconductor chips having first connection members and stacked in a manner such that the first connection members of the semiconductor chips are electrically connected to one another;
- and
- second connection members electrically connecting the first connection members of the respective chip modules to the first bond finger and the second bond finger of the substrate.
A semiconductor package comprising:
- a substrate having bond fingers on an upper surface thereof;
- at least two chip modules stacked on the upper surface of the substrate, each of the at least two chip modules including:
- a plurality of semiconductor chips having first connection members and stacked in a manner such that the first connection members of the semiconductor chips are electrically connected to one another, the first connection members of the plurality of semiconductor chips being a connection part of the chip module,
- the chip modules being stacked in a step pattern such that the connection parts of the respective chip modules project in one sideward direction;
- and
- second connection members connecting the connection parts of the respective chip modules to the bond fingers of the substrate.
Dependencies are inferred from the claim text.