Semiconductor power device having a top-side drain using a sinker trench

#This invention relates in general to semiconductor power devices and more particularly to power devices with top-side drain contact using a sinker trench.

#Unlike integrated circuits (ICs) which have a lateral structure with all interconnects available on the upper die surface, many power semiconductor devices have a vertical structure with the back of the die being an active electrical connection. For example, in vertical power MOSFET structures, the source and gate connections are at the top surface of the die and the drain connection is on the back side of the die. For some applications, it is desirable to make the drain connection accessible at the top side. Sinker trench structures are used for this purpose.

#In a first technique, diffusion sinkers extending from the top-side of the die down to the substrate (which forms the drain contact region of the device) are used to make the drain contact available at the top surface of the die. A drawback of this technique is that the lateral diffusion during the formation of the diffusion sinkers results in consumption of a significant amount of the silicon area.

#FIG. 1 shows a simplified cross sectional view of an exemplary vertical power device in accordance with an embodiment of the invention;

#FIGS. 2-4 show various top layout views of a vertical power device with one or more sinker trenches in accordance with exemplary embodiments of the invention; and

#FIG. 5 is a top view illustrating the locations of interconnect balls in a ball-grid array package relative to a sinker trench extending along the perimeter of a die housed in the ball-grid array package, in accordance with an exemplary embodiment of the invention.

#In accordance with an embodiment of the present invention, a sinker trench terminating within the silicon substrate is filled with a highly conductive material such as doped polysilicon or metallic material. The sinker trench is laterally spaced a predetermined distance from the active region wherein gate trenches are formed. The sinker trench is wider and extends deeper than the gate trenches, and is lined with an insulator only along its sidewalls. This technique eliminates the area loss due to side diffusion of the diffusion sinker approach, and results in improved on-resistance since a more conductive material is used than diffusion. Also, this technique requires a far shallower trench than that needed in the technique where a metal-filled trench extends from the top to the bottom of the die. The on-resistance is improved since the current need not travel through the entire depth of the substrate to reach the drain contact.

#FIG. 1 shows a simplified cross sectional view of a vertical trenched-gate power MOSFET structure 100 in accordance with an exemplary embodiment of the invention. An n-type epitaxial layer 104 extends over an n-type substrate 102 which forms the back side drain. A sinker trench 106 extends from the top surface of epitaxial layer 104 through epitaxial layer 104 terminating within substrate 102. A dielectric layer 110 lines the sinker trench sidewalls. Dielectric layer 110 may be from any one of oxide, silicon nitride, silicon oxynitride, multilayer of oxide and nitride, any known low k insulating material, and any known high k insulating material. “Oxide” as used in this disclosure means a chemical vapor deposited oxide (SixOy) or a thermally grown silicon dioxide (SiO2). Sinker trench 106 is filled with a conductive material 108 such as doped polysilicon, selective epitaxial silicon (SEG), metal, or metallic compounds. Conductive material 108 is in electrical contact with substrate 102 along the bottom of sinker trench 106. Conductive material 108 thus makes the back-side drain available along the top side for interconnection. With the drain contact moved to the top surface, a back-side metal for contacting substrate 102 is no longer needed, but could be used in conjunction with the top side contact. The back side metal layer may be included for other purposes such as preventing the die from cracking and improving the heat transfer properties of the device.

#Well regions 114 of p-type conductivity extend along an upper portion of epitaxial layer 104. Gate trenches 112 are laterally spaced from sinker trench 106 by a predetermined distance S1, and vertically extend from the top surface through p-type well regions 114 terminating at a predetermined depth within epitaxial layer 104. Sinker trench 106 is wider and deeper than gate trenches 112. Gate trenches 112 are lined with a dielectric layer 116. The dielectric along the bottom of gate trenches 112 may optionally be made thicker than the dielectric along the gate trench sidewalls. Each gate trench 112 includes a gate electrode 118 and a dielectric layer 120 atop gate electrode 118 to reduce the gate to drain capacitance. Source regions 122 of n-type conductivity extend along an upper portion of well regions 114. Source regions 122 overlap gate electrodes 118 along the vertical dimension. As can be seen well region 114 terminates a distance away from sinker trench 106. In one embodiment, this distance is dictated by the device blocking voltage rating. In another embodiment, well region 114 terminates at and thus abuts sinker trench 106. In this embodiment, for higher blocking voltage ratings, the thickness of the dielectric layer along sinker trench sidewalls needs to be made larger since the sinker dielectric is required to withstand a higher voltage. This may require a wider sinker trench if the conductive material 108 is required to have a minimum width for current handling purposes.