LDMOS with N-type isolation ring and method of fabricating the same
AssigneeUnited Microelectronics Corp.
InventorsChin-Lung Chen, Chun-Ching Yu, Jung-Ching Chen, Ming-Tsung Tung
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AssigneeUnited Microelectronics Corp.
InventorsChin-Lung Chen, Chun-Ching Yu, Jung-Ching Chen, Ming-Tsung Tung
Estimating the term…
A semiconductor device and an IC chip are described. The deep N-well region is configured in a substrate. The P-well region surrounds a periphery of the deep N-well region. The gate structure is disposed on the substrate of the deep N-well region. The P-body region is configured in the deep N-well region at one side of the gate structure. The first N-type doped region is configured in the P-body region. The second N-type doped region is configured pin the deep N-well region at the other side of the gate structure. The first isolation structure is disposed between the gate structure and the second N-type doped region. The N-type isolation ring is configured in the deep N-well region and corresponding to an edge of the deep N-well region, wherein a doping concentration of the N-type isolation ring is higher than that of the deep N-well region.
A semiconductor device, comprising:
A semiconductor device, comprising:
Dependencies are inferred from the claim text.