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US 8,026,534 B2Granted
III-V semiconductor device structures
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsThomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald
Life of this patent
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Abstract
The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
Claims20
A structure comprising:
- a handle wafer having a dielectric layer, the dielectric layer consisting essentially of a dielectric material;
- a compositionally graded layer comprising at least one III-V compound disposed over the handle wafer;
- and
- a substrate disposed over the compositionally graded layer.
1 more element
A structure comprising:
- a handle wafer comprising silicon;
- a relaxed layer comprising at least one first III-V compound disposed over the handle wafer;
- and
- a compositionally graded layer comprising at least one second III-V compound disposed over and in contact with the relaxed layer.
1 more element
A structure comprising:
- a bulk relaxed substrate consisting essentially of silicon;
- a compositionally graded layer comprising at least one first III-V compound disposed over the bulk relaxed substrate;
- and
- a substrate disposed over the compositionally graded layer.
1 more element
Dependencies are inferred from the claim text.