Method of forming a single-layer metal conductors with multiple thicknesses
AssigneeSanDisk Technologies LLC
InventorsDeepak Chandra Sekar, Nima Mokhlesi
Life of this patent
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Abstract
A pattern that includes trenches of different depths is formed on a substrate using nanoimprint lithography. A subsequent metal deposition forms lines of different thicknesses according to trench depth, from a single metal layer. Vias extending down from lines are also formed from the same layer. Individual bit lines are formed having different thicknesses at different locations.
Claims25
A method of forming an integrated circuit, comprising:
- forming a resist layer over a substrate surface;
- pressing a template into the resist layer to form a first trench that is elongated in a direction parallel to the substrate surface, the first trench having a first depth in the resist layer, and a second trench that is elongated in a direction parallel to the substrate surface, the second trench having a second depth in the resist layer, the first depth is different than the second depth;
- subsequently removing the template from the resist layer to expose the first trench and the second trench;
- depositing a layer of conductive material to fill the first trench and the second trench;
- and
- planarizing the conductive material to remove excess conductive material, leaving a first portion of the conductive material in the first trench and a second portion of the conductive material in the second trench to form a continuous conductive horizontal line, the first portion of material having a first resistance per unit length along the continuous conductive horizontal line and the second portion of material having a second resistance per unit length along the continuous conductive horizontal line.
A method of forming a nonvolatile memory system, comprising:
- forming openings in a dielectric material, the openings extending to a conductive element underlying the dielectric material;
- forming a trench in the dielectric material using nanoimprint lithography, the trench having a first portion that is elongated horizontally in the dielectric and a second portion that is elongated horizontally in the dielectric, a first location in the first portion has a first depth and a second location in the second portion has a second depth, the first depth is different from the second depth, the first and second depths being less than the thickness of the dielectric material;
- filling the openings with metal to form vias;
- and
- forming a bit line by depositing a metal layer over the trench to fill the trench, the bit line having a first vertical thickness at the first location and a second vertical thickness at the second location, the vias are electrically connected to the bit line.
A method of forming an integrated circuit, comprising:
- forming a resist layer over a substrate surface;
- pressing a template into the resist layer to form a first trench that is elongated in a direction parallel to the substrate surface, the first trench having a first depth in the resist layer, and a second trench that is elongated in a direction parallel to the substrate surface, the second trench having a second depth in the resist layer, the first depth is different than the second depth;
- subsequently removing the template from the resist layer to expose the first trench and the second trench;
- depositing a layer of conductive material to fill the first trench and the second trench;
- planarizing the conductive material to remove excess conductive material, leaving a first portion of the conductive material in the first trench and a second portion of the conductive material in the second trench to form a conductive horizontal line, the first portion of material having a first resistance per unit length along the conductive horizontal line and the second portion of material having a second resistance per unit length along the conductive horizontal line;
- and
- providing a driver coupled to the horizontal line, the first portion is closer to the driver than the second portion, the first resistance per unit length along the conductive horizontal line is less than the second resistance per unit length along the conductive horizontal line.
A method of forming a nonvolatile memory system, comprising:
- forming a trench in a dielectric material using nanoimprint lithography, the trench having a first portion that is elongated horizontally in the dielectric and a second portion that is elongated horizontally in the dielectric, a first location in the first portion has a first depth and a second location in the second portion has a second depth, the first and second depths being less than the thickness of the dielectric material;
- forming additional openings in the dielectric material extending from the trench to a conductive element underlying the dielectric material;
- filling the additional openings with metal to form vias;
- and
- forming a bit line by depositing a metal layer over the trench to fill the trench, the bit line having a first vertical thickness at the first location and a second vertical thickness at the second location, the vias are electrically connected to the bit line, the bit line is coupled to a driver, the first location is closer to the driver than the second location, the resistance per unit length along the bit line at the first location is less than the resistance per unit length along the bit line at the second location.
Dependencies are inferred from the claim text.