SOI radio frequency switch for reducing high frequency harmonics

A method of operating a semiconductor device comprising:

• providing a semiconductor device including:
• a semiconductor-on-insulator (SOI) substrate including a top semiconductor layer, a buried insulator layer, and a bottom semiconductor layer having a doping of a first conductivity type;
• at least one field effect transistor located on said top semiconductor layer;
• a shallow trench isolation structure laterally abutting said at least one field effect transistor;
• a first doped semiconductor region embedded in said bottom semiconductor layer and abutting said buried insulator layer and having a doping of said first conductivity type;
• and
• a second doped semiconductor region embedded in said bottom semiconductor layer and abutting said buried insulator layer and having a doping of a second conductivity type, wherein said second conductivity type is the opposite of said first conductivity type;
• applying a radio frequency (RF) signal to said at least one field effect transistor, wherein an induced charge layer is formed directly underneath said buried insulator layer;
• and
• electrically biasing said first and second doped semiconductor regions at a same voltage.

A semiconductor structure comprising:

• a semiconductor-on-insulator (SOI) substrate including a top semiconductor layer, a buried insulator layer, and a bottom semiconductor layer having a doping of a first conductivity type;
• at least one field effect transistor located on said top semiconductor layer;
• a shallow trench isolation structure laterally abutting said at least one field effect transistor;
• a first doped semiconductor region embedded in said bottom semiconductor layer and abutting said buried insulator layer and having a doping of said first conductivity type;
• and
• a second doped semiconductor region embedded in said bottom semiconductor layer and abutting said buried insulator layer and having a doping of a second conductivity type, wherein said second conductivity type is the opposite of said first conductivity type, and wherein said first and second doped semiconductor region are electrically biased at a same voltage.

A non-transitory machine readable storage medium embodying a design structure for designing, manufacturing, or testing a design for a semiconductor structure, wherein said design structure comprises a netlist describing a semiconductor structure including at least one semiconductor located on a semiconductor-on-insulator substrate, said netlist comprising:

• a first data representing a semiconductor-on-insulator (SOI) substrate including a top semiconductor layer, a buried insulator layer, and a bottom semiconductor layer having a doping of a first conductivity type;
• a second data representing at least one field effect transistor located on said top semiconductor layer;
• a third data representing a shallow trench isolation structure laterally abutting said at least one field effect transistor;
• a fourth data representing a first doped semiconductor region embedded in said bottom semiconductor layer and abutting said buried insulator layer and having a doping of said first conductivity type;
• and
• a fifth data representing a second doped semiconductor region embedded in said bottom semiconductor layer and abutting said buried insulator layer and having a doping of a second conductivity type, wherein said second conductivity type is the opposite of said first conductivity type, wherein said first and second doped semiconductor region are electrically biased at a same voltage.