Dielectric enhancements to chip-to-chip capacitive proximity communication

A processing unit that provides for increased signal coupling between capacitively-coupled chips, the processing unit comprising:

• a first semiconductor chip comprising a signal pad atop which a high permittivity dielectric material layer is deposited;
• and
• a second semiconductor chip in proximity to the first semiconductor chip such that a face of a signal pad of the second chip is aligned with a face of the signal pad of the first chip to enable for capacitive signal coupling, with the face of the signal pad of the first chip being an area of deposition of the high permittivity dielectric material layer,
• wherein the high permittivity dielectric material layer fills at least a portion of a gap between the first chip and the second chip, and
• wherein the high permittivity dielectric material layer improves capacitive coupling between signal pads of the first chip and the second chip by providing for an increased permittivity in the gap between the first chip and the second chip, with the increased permittivity ensuring that electric fields are substantially confined to a space between the signal pad of the first chip and the signal pad of the second chip
• wherein at least one of a width and a length of the deposited high permittivity dielectric material layer perpendicular to the gap between the first semiconductor chip and the second semiconductor chip is less than or equal to at least one of a width and a length of the signal pad of the first semiconductor chip.