Substrate for semiconductor package having a reinforcing member that prevents distortions and method for fabricating the same

A method for fabricating a substrate for a semiconductor package, comprising the steps of:

• preparing a substrate body which is provided with a first region having a plurality of chip mount regions, a second region disposed along a periphery of the first region, a circuit pattern disposed in each chip mount region and a dummy pattern disposed along the second region;
• forming an insulation layer, which covers the first and second regions and which has an opening that exposes portions of each circuit pattern, over the substrate body;
• and
• forming a reinforcing member, which substantially prevents or minimizes deflections of the substrate body, in the second region.

A method for fabricating a substrate for a semiconductor package, comprising the steps of:

• preparing a substrate body having a first region having a plurality of chip mount regions and having a second region disposed along a periphery of the first region;
• forming a reinforcing member along the second region;
• forming a metal layer in the first and second regions and which covers the reinforcing member;
• forming a circuit pattern part in each chip mount region and a reinforcing pattern part covering an upper face of the reinforcing member by patterning the metal layer;
• and
• forming an insulation layer which covers the first region and which has an opening that exposes a portion of the circuit pattern.

A method for fabricating a substrate for a semiconductor package, comprising the steps of:

• preparing a substrate body having a first region having a plurality of chip mount regions and having a second region disposed along a periphery of the first region;
• forming a metal layer covering the first and second regions;
• forming a reinforcing pattern with a first thickness over the portion of the substrate body corresponding to the second region and forming a preliminary circuit pattern part with a second thickness which is thinner than the first thickness over the portion of the substrate corresponding to each chip mount region by patterning the metal layer;
• forming a circuit pattern in each chip mount region by patterning the preliminary circuit pattern part;
• and
• forming an insulation layer which covers the first region and which has an opening that exposes a portion of the circuit pattern.

A method for fabricating a substrate for a semiconductor package, comprising the steps of:

• preparing a substrate body which is provided with a chip mount part having a first thickness and formed with a plurality of chip mount regions and a reinforcing pattern part formed along an edge of the chip mount part and having a second thickness thicker than the first thickness;
• forming a circuit pattern in each chip mount region;
• and
• forming an insulation layer which covers the chip mount region and which has an opening that exposes a portion of the circuit pattern.

A method for fabricating a substrate for a semiconductor package, comprising the steps of:

• forming a substrate body which includes a first region having a plurality of chip mount regions, and which includes a second region disposed along the periphery of the first region and which has through holes passing through the second region;
• forming a reinforcing member which fills the through holes and covers the second region;
• and
• forming an insulation layer which covers the first region.