Anti-fuse repair control circuit and semiconductor device including DRAM having the same
AssigneeHynix Semiconductor Inc.
InventorsShin Ho Chu, Sun Mo An
Life of this patent
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AssigneeHynix Semiconductor Inc.
InventorsShin Ho Chu, Sun Mo An
Estimating the term…
In an anti-fuse repair control circuit, a semiconductor memory device is integrated into a multi-chip package to perform an anti-fuse repair. An anti-fuse repair control circuit includes a data mask signal input circuit, a cell address enable unit a repair enable unit, and a repair unit. The data mask signal input circuit receives and outputs a data mask signal upon receiving a test control signal for an anti-fuse repair. The cell address enable unit receives an anti-fuse repair address to enable a cell address of an anti-fuse cell to be repaired upon receiving the data mask signal outputted from the data mask signal input circuit. The repair enable unit codes the cell address and output a repair enable signal and a drive signal according to whether or not an anti-fuse cell corresponding to the cell address is enabled. The repair unit supplies a repair voltage to the anti-fuse cell when the repair enable signal, the address, and the drive signal are enabled.
A repair control circuit, comprising:
A semiconductor device including a plurality of DRAMs in a package in which the plurality of DRAMs shares at least a command and a repair address, and each DRAM independently receives a data mask signal, and the DRAM comprises:
Dependencies are inferred from the claim text.