Content addressable memory device having spin torque transfer memory cells
AssigneeNetLogic Microsystems, Inc.
InventorNilesh A. Gharia
Life of this patent
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Abstract
A CAM device includes an array of CAM cells each having a spin torque transfer (STT) storage cell to store a data bit. Each STT storage cell includes a first magnetic tunnel junction (MTJ) element coupled between a first input node and an output node of the CAM cell, a second MTJ element coupled between a second input node and the output node of the CAM cell, and a first match transistor coupled between the match line and ground potential and having a gate coupled to the output node. The logic state of the data bit is represented by the relative resistances of the first and second MTJ elements.
Claims37
A content addressable memory (CAM) device, comprising:
- an array having a number of CAM rows, each row including a plurality of CAM cells coupled to a match line, wherein each CAM cell includes a spin-torque transfer (STT) storage cell for storing a data bit;
- and
- a priority encoder having inputs coupled to the match lines and having an output to generate an index of the matching row that has the highest priority, wherein each STT storage cell comprises:
- a first magnetic tunnel junction (MTJ) element coupled between a first input node and an output node of the STT storage cell;
- a second MTJ element coupled between a second input node and the output node of the STT storage cell, wherein the first and second input nodes are different;
- and
- a first match transistor connected between the match line and ground potential and having a gate directly connected to the output node, wherein the output node is directly connected to both the first and second MTJ elements.
A content addressable memory (CAM) device, comprising:
- an array having a number of CAM rows, each row including a plurality of CAM cells coupled to a match line, wherein each CAM cell includes a spin-torque transfer (STT) storage cell for storing a data bit;
- a priority encoder having inputs coupled to the match lines and having an output to generate an index of the matching row that has the highest priority, wherein each STT storage cell comprises:
- a first tunnel magnetoresistance (TMR) element coupled between a first input node and an output node of the STT storage cell;
- a second TMR element coupled between a second input node and the output node of the STT storage cell, wherein the first and second input nodes are different;
- and
- a first match transistor connected between the match line and ground potential and having a gate directly connected to the output node, wherein the output node is directly connected to both the first and second MTJ elements.
A content addressable memory (CAM) cell including a spin-torque transfer (STT) storage cell, comprising:
- a first magnetic tunnel junction (MTJ) element coupled between a first input node and an output node of the CAM cell;
- a second MTJ element coupled between a second input node and the output node of the CAM cell, wherein the first and second input nodes are different;
- and
- a first match transistor connected between the match line and ground potential and having a gate directly connected to the output node, wherein the output node is directly connected to both the first and second MTJ elements.
Dependencies are inferred from the claim text.