US 8,020,132 B2 · Combined memories in integrated circuits

Abstract

Combined memories in integrated circuits are described, including determining a first requirement for logic blocks, determining a second requirement for memory blocks including a vertical configuration for the memory blocks, and compiling a design for the integrated circuit using the first requirement and the second requirement. The memory blocks may include non-volatile two-terminal cross-point memory arrays. The non-volatile two-terminal cross-point memory arrays can be formed on top of a logic plane. The logic plane can be fabricated in a substrate. The non-volatile two-terminal cross-point memory arrays may be vertically stacked upon one another to form a plurality of memory planes. The memory planes can be portioned into sub-planes. One or more different memory types such as Flash, SRAM, DRAM, and ROM can be emulated by the plurality of memory planes and/or sub-planes. The non-volatile two-terminal cross-point memory arrays can include a plurality of two-terminal memory elements.

Claims13

Dependent claims

A non-transitory computer readable medium having program instructions configured to execute on and cause a computer system to perform a method of designing an application specific integrated circuit (ASIC) having vertically integrated non-Flash re-writeable non-volatile memory, comprising the steps of:

determining a first requirement for logic blocks included in a logic plane fabricated on a silicon substrate, at least a portion of the logic blocks operative to perform data operations on a plurality of non-volatile re-writeable resistivity-sensitive two-terminal memory elements configured in one or more two-terminal cross-point memory arrays that are electrically coupled with the logic blocks;
determining a second requirement for memory blocks including determining a vertical configuration for the memory blocks, the memory blocks are positioned in one or more memory planes in contact with and fabricated directly above the silicon substrate, each memory plane including at least one of the two-terminal cross-point memory arrays, and the one or more memory planes are vertically stacked upon one another according to the vertical configuration;
compiling a design for fabricating an integrated circuit (IC) that includes the memory blocks in contact with and vertically, fabricated directly above the silicon substrate using the first requirement and the second requirement;
and
outputting the design for the IC in at least one non-transitory computer readable medium.

2 more elements

Dependencies are inferred from the claim text.

Combined memories in integrated circuits

Life of this patent

Combined memories in integrated circuits

Life of this patent

Abstract

Claims13